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CS5543-KL

22-Bit, Multi-Channel ∆Σ ADC Chip Set

Cirrus Logic 

CS5542 CS5543

provided into the CS5542. The CS5542 dual mod-

ulator is designed to allow for two possible means

of inputting the signal necessary to perform this

calibration step. The input method chosen will dic-

tate whether an ICAL Full-Scale Gain Cal or a Sys-

tem Full-Scale Gain Cal is to be performed.

At the input of the CS5542 is an ICAL pin. A cur-

rent can be sourced into this pin to provide a cali-

bration current to set the full scale point (actually

97% of the full scale value as will be discussed lat-

er) of the system. The current into the ICAL pin

will be used to calibrate the gain if the Full-Scale

Gain Cal mode (using the ICAL input) is selected.

Note that the ICAL pin on the CS5542 is shared be-

tween the two modulators. Each modulator will be

calibrated sequentially (only one of eight channels

will be active at a time during the calibration if the

ICAL Full-Scale Gain Cal mode is executed. The

CS5543 will sequentially calibrate each one of the

eight modulators associated with it. Each Gain Cal

requires 5 filter cycles; therefore 40 filter cycles

will elapse for the ICAL Full-Scale Gain Cal. At

the end of the Gain Cal, a 24-bit calibration word is

placed into the Gain Register of the CS5543.

Selection of the ICAL Full-Scale Gain Cal mode

enables the ICAL input switch (note that the normal

current input remains active and its current will be

summed with the ICAL current when using this

mode). During an ICAL Full-Scale Gain Cal cycle,

only one ICAL input is active at any one time,

therefore a single external resistor and a voltage

source can supply a current which can be used to

calibrate all eight channels associated with a single

CS5543. Alternatively, four individual resistors

can be supplied, one for each CS5542 dual channel

ICAL input.

The magnitude of the calibration current should be

3% less than the desired full scale current. Recall

that the nominal full scale input current magnitude

is set by the size of the internal transimpedance ca-

pacitor, the clock rate, and the VREF voltage. The

output code produced by this current will be 221 -

216 -1 or approximately 97% of full scale. The

97% gain point can be calibrated with currents as

low as 40% below the nominal full scale value set

by the clock rate, cap size, and VREF voltage. It is

preferable to keep the input current for calibration

within 20% of the nominal full scale value as lower

levels of input calibration magnitude will exhibit a

slight reduction in dynamic range.

If the Full-Scale Gain Cal mode using INL (INR) is

selected, the ICAL input MUX at the front of each

CS5542 is not used. Instead, the gain is calibrated

using the current input into the INL and INR pins.

Again, the current supplied should be 3% less than

the desired full scale value. The output code due to

this current will be set to 221 - 216 -1 or approxi-

mately 97% of full scale.

For either gain calibration mode (ICAL or INL

(INR)) the magnitude of the input current should be

97% of the nominal full scale, but the polarity is not

important. The current can be sinked or sourced.

In either case the CS5543 will calibrate the positive

full scale point. Once calibrated, currents into the

INL or INR pins will result in a positive output

code, while currents out of the pins will yield a neg-

ative output code.

Calibration Register Readability

The CS5543 has registers which hold the digital

calibration words for each of the eight channels.

For each of the channels, there are four 24-bit reg-

isters. The Noise Cal and Gain Cal functions each

result in a 24-bit digital calibration word, whereas

the System Offset Cal function produces a 48-bit

calibration word which is split into two 24-bit reg-

isters. These registers can be read and their contents

stored into some nonvolatile storage from which

they can be recalled and reloaded if so desired.

The 48-bit Offset register contents must be read or

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DS109PP2

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