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LTC1093C

1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems

Linear Technology 

LTC1091/LTC1092

LTC1093/LTC1094

PI FU CTIO S

VREF (Pin 11)(LTC1093): Reference Input. The reference

input must be kept free of noise with respect to AGND.

REF +, REF – (Pins 13, 14 )(LTC1094): Reference Input.

The reference input must be kept free of noise with respect

to AGND.

DIN (Pin 12/Pin 15): Data Input. The A/D configuration

word is shifted into this input.

DOUT (Pin 13/Pin 16): Digital Data Output. The A/D con-

version result is shifted out of this output.

CS (Pin 14/Pin 17): Chip Select Input. A logic low on this

input enables the LTC1093/LTC1094.

CLK (Pin 15/Pin 18): Shift Clock. This clock synchronizes

the serial data transfer.

VCC (Pin 16)(LTC1093): Positive Supply. This supply

must be kept free of noise and ripple by bypassing directly

to the analog ground plane.

AVCC, DVCC (Pins 19, 20)(LTC1094): Positive Supply.

This supply must be kept free of noise and ripple by

bypassing directly to the analog ground plane. AVCC and

DVCC should be tied together on the LTC1094.

BLOCK DIAGRA (Pin numbers refer to LTC1094)

AVCC 20

DIN 15

INPUT

SHIFT

REGISTER

CH0 1

CH1 2

CH2 3

CH3 4

CH4 5

CH5 6

CH6 7

CH7 8

COM 9

ANALOG

INPUT MUX

DVCC

19

SAMPLE-

AND-HOLD

COMP

10-BIT

CAPACITIVE

DAC

10

11

DGND

V–

12

AGND

13

REF–

14

REF+

OUTPUT

SHIFT

REGISTER

18 CLK

16 DOUT

10-BIT

SAR

CONTROL

AND

TIMING

17 CS

1091/2/3/4 BD

9

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