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AD5045
(Rev.:RevA)

Fully Accurate, 12-/14-/16-Bit, Dual, VOUT nanoDAC SPI Interface, 4.5 V to 5.5 V in a TSSOP

Analog Devices 

Data Sheet

AD5025/AD5045/AD5065

SPECIFICATIONS

VDD = 4.5 V to 5.5 V, RL = 5 kΩ to GND, CL = 200 pF to GND, 2.5 V ≤ VREFIN ≤ VDD, unless otherwise specified. All specifications TMIN to

TMAX, unless otherwise noted.

Table 2.

Parameter

STATIC PERFORMANCE3

Resolution

AD5065

AD5045

AD5025

Relative Accuracy

AD5065

AD5065

AD5045

AD5045

AD5025

AD5025

Differential Nonlinearity

Total Unadjusted Error

Offset Error

Offset Error Drift4

Full-Scale Error

Gain Error

Gain Temperature Coefficient4

DC Crosstalk4

OUTPUT CHARACTERISTICS4

Output Voltage Range

Capacitive Load Stability

DC Output Impedance

Normal Mode

Power-Down Mode

Output Connected to

100 kΩ Network

Output Connected to

1 kΩ Network

Short-Circuit Current

Power-Up Time

DC PSRR

REFERENCE INPUTS

Reference Input Range

Reference Current

Reference Input Impedance

B Grade1

A Grade1, 2

Min Typ Max Min

Typ Max Unit

Conditions/Comments

16

16

14

12

±0.4

+0.4

±0.1

±0.1

±0.05

±0.05

±0.2

±0.2

±0.2

±1

±2

±0.5

±1

±0.25

±0.5

±1

±2.5

±1.8

±2

±0.01

±0.005

±1

±0.07

±0.05

40

40

40

0

VDD

0

1

0.5

100

1

60

45

4.5

−92

2.2

VDD

2.2

35

50

120

Bits

±0.5

±0.5

±0.2

±0.2

±0.2

±2

±0.01

±0.005

±1

±4

±4

±1

±2.5

±1.8

±0.07

±0.05

40

40

40

LSB

LSB

LSB

LSB

mV

mV

µV/°C

% FSR

% FSR

ppm

µV

µV/mA

µV

TA = −40°C to +105°C

TA = −40°C to +125°C

TA = −40°C to +105°C

TA = −40°C to +125°C

TA = −40°C to +105°C

TA = −40°C to +125°C

VREF = 2.5 V; VDD = 5.5 V

Code 512 (AD5065), Code 128 (AD5045),

Code 32 (AD5025) loaded to DAC register

All 1s loaded to DAC register, VREF < VDD

Of FSR/°C

Due to single channel full-scale output

change, RL = 5 kΩ to GND or VDD

Due to load current change

Due to powering down (per channel)

VDD

V

1

nF

RL = 5 kΩ, RL = 100 kΩ, and RL = ∞

0.5

Ω

100

kΩ

Output impedance tolerance ± 400 Ω

1

kΩ

Output impedance tolerance ± 20 Ω

60

mA

DAC = full scale, output shorted to GND

45

mA

DAC = zero-scale, output shorted to VDD

4.5

µs

Time to exit power-down mode to

normal mode of AD5024/AD5044/

AD5064, 32nd clock edge to 90% of DAC

midscale value, output unloaded

−92

dB

VDD ± 10%, DAC = full scale, VREF < VDD

VDD

V

35

50

µA

120

kΩ

Per DAC channel

Rev. A | Page 3 of 25

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