AD5763(RevC) Ver la hoja de datos (PDF) - Analog Devices
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AD5763 Datasheet PDF : 28 Pages
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Data Sheet
AD5763
Parameter
DIE TEMPERATURE SENSOR
Output Voltage at 25°C
Output Voltage Scale Factor
Output Voltage Range
Output Load Current
Power-On Time
POWER REQUIREMENTS
AVDD/AVSS
DVCC
AIDD
AISS
DICC
Power Supply Sensitivity1
∆VOUT/∆ΑVDD
Power Dissipation
Min
1.175
4.75
2.7
Typ Max
1.44
3
1.9
200
10
5.25
5.25
2.5 3.5
2
3.25
0.75 1.2
−110
45
1 Guaranteed by design and characterization; not production tested.
2 Output amplifier headroom requirement is 0.5 V minimum.
Unit
V
mV/°C
V
μA
ms
V
V
mA/channel
mA/channel
mA
dB
mW
Test Conditions/Comments
Outputs unloaded
Outputs unloaded
VIH = DVCC, VIL = DGND
±5 V operation output unloaded
AC PERFORMANCE CHARACTERISTICS
AVDD = 4.75 V to 5.25 V, AVSS = −5.25 V to −4.75 V, AGNDx = DGND = REFGND = PGND = 0 V, REFA = REFB = 2.048 V,
DVCC = 2.7 V to 5.25 V, RLOAD = 5 kΩ, CLOAD = 200 pF. All specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
DYNAMIC PERFORMANCE1
Output Voltage Settling Time
Slew Rate
Digital-to-Analog Glitch Energy
Glitch Impulse Peak Amplitude
Channel-to-Channel Isolation
DAC-to-DAC Crosstalk
Digital Crosstalk
Digital Feedthrough
Output Noise (0.1 Hz to 10 Hz)
Output Noise (0.1 Hz to 100 kHz)
1/f Corner Frequency
Output Noise Spectral Density
Complete System Output Noise Spectral Density2
Min Typ Max Unit
8
10
2
5
20
30
60
8
2
2
0.1
50
300
70
80
μs
μs
μs
V/μs
nV-sec
mV
dB
nV-sec
nV-sec
nV-sec
LSB p-p
μV rms
Hz
nV/√Hz
nV/√Hz
Test Conditions/Comments
Full-scale step to ±1 LSB
512 LSB step settling
Effect of input bus activity on DAC outputs
Measured at 10 kHz
Measured at 10 kHz
1 Guaranteed by design and characterization; not production tested.
2 Includes noise contributions from integrated reference buffers, 16-bit DAC, and output amplifier.
Rev. C | Page 5 of 28
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