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AD7911(Rev0) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza
componentes Descripción
Lista de partido
AD7911 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7911/AD7921
Parameter
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time2
Throughput Rate
POWER REQUIREMENTS
VDD
IDD
Normal Mode (Static)
Normal Mode (Operational)
Full Power-Down Mode (Static)
Full Power-Down Mode (Dynamic)
Power Dissipation4
Normal Mode (Operational)
Full Power-Down
A Grade1
2.8
290
250
2.35/5.25
3
1.5
4
2
1
0.38
0.2
20
6
5
1 Operational from VDD = 2 V, with VIH = 1.9 V minimum and VIL = 0.1 V maximum.
2 See the Terminology section.
3 Guaranteed by characterization.
4 See the Power vs. Throughput Rate section.
Unit
Test Conditions/Comments
µs max
ns max
kSPS max
14 SCLK cycles with SCLK at 5 MHz
V min/max
mA typ
mA typ
mA max
mA max
µA max
mA typ
mA typ
Digital I/Ps = 0 V or VDD
VDD = 4.75 V to 5.25 V, SCLK on or off
VDD = 2.35 V to 3.6 V, SCLK on or off
VDD = 4.75 V to 5.25 V, fSAMPLE = 250 kSPS
VDD = 2.35 V to 3.6 V, fSAMPLE = 250 kSPS
SCLK on or off, typically 50 nA
VDD = 5 V, fSCLK = 5 MHz, fSAMPLE = 25 kSPS
VDD = 3 V, fSCLK = 5 MHz, fSAMPLE = 25 kSPS
mW max
mW max
µW max
VDD = 5 V, fSAMPLE = 250 kSPS
VDD = 3 V, fSAMPLE = 250 kSPS
VDD = 5 V
Rev. 0 | Page 4 of 28

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