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AD8392ARE

Low Power, High Output Current, Quad Op Amp, Dual-Channel ADSL/ADSL2+ Line Driver

Analog Devices 

AD8392

0.06

2.5

2.0

0.04

1.5

1.0

0.02

0.5

0

0

–0.5

–0.02

–1.0

–1.5

–0.04

–2.0

–0.06

–10 –8 –6 –4 –2 0 2 4 6 8 10

TIME (µs)

Figure 16. Small Signal Pulse Response

Quad Op Amp Circuit (Figure 29)

E VS = ±12 V, RLOAD = 100 Ω, G = +5, 100 mV Step

T OUTPUT

1

LE 2

PD PINS

CH1 200mVΩ BW CH2 1.00mVΩBW M 50.0ns A CH2 2.38V

O Figure 17. Power-Up Time: PD (1, 1) to PD (0, 0)

Quad Op Amp Circuit (Figure 29)

VS = ±12 V, RLOAD = 100 Ω, G = +5, VOUT = 1 V p-p

S∆: 460ns

@: –1.32µs

C1 p-p

27.0V

C2 p-p

21.4V

B 1

O 2

–2.5

–10 –8 –6 –4 –2 0 2 4 6 8 10

TIME (µs)

Figure 19. Large Signal Pulse Response

Quad Op Amp Circuit (Figure 29)

VS = ±12 V, RLOAD = 100 Ω, G = +5, 4 V Step

PD PINS

1

OUTPUT

2

CH1 200mVΩBW CH2 1.00VΩBW M 400ns

CH2 2.38V

Figure 20. Power-Down Time: PD (0, 0) to PD (1, 1)

Quad Op Amp Circuit (Figure 29)

VS = ±12 V, RLOAD = 100 Ω, G = +5, VOUT = 1 V p-p

∆: 420ns

@: 2.84µs

C1 p-p

6.00V

C2 p-p

21.8V

1

2

OUTPUT

OUTPUT

INPUT

INPUT

CH1 5.00VΩ CH2 5.00VΩ M1.00µs

CH1 700mV

Figure 18. Input Overdrive Recovery

Quad Op Amp Circuit (Figure 29)

VS = ±12 V, RLOAD = 100 Ω, G = +1, VIN = 27 V p-p

CH1 1.00VΩ CH2 5.00VΩ M1.00µs

CH1 800mV

Figure 21. Output Overdrive Recovery

Quad Op Amp Circuit (Figure 29)

VS = ±12 V, RLOAD = 100 Ω, G = +5, VIN = 6 V p-p

Rev. A | Page 8 of 16

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