AD9510-VCO(RevB) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Lista de partido

AD9510-VCO
(Rev.:RevB)

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs

Analog Devices 

AD9510

Data Sheet

CLOCK OUTPUTS

Table 3.

Parameter

LVPECL CLOCK OUTPUTS

OUT0, OUT1, OUT2, OUT3;

Differential

Output Frequency

Output High Voltage

Output Low Voltage

Output Differential Voltage

LVDS CLOCK OUTPUTS

OUT4, OUT5, OUT6, OUT7;

Differential

Output Frequency

Differential Output Voltage

Delta VOD

Output Offset Voltage

Delta VOS

Short-Circuit Current

CMOS CLOCK OUTPUTS

OUT4, OUT5, OUT6, OUT7

Output Frequency

Output Voltage High

Output Voltage Low

Symbol

VOH

VOL

VOD

VOD

VOS

ISA, ISB

Min

Typ

Max

Unit

1200

MHz

VS − 1.22 VS − 0.98 VS − 0.93 V

VS − 2.10 VS − 1.80 VS − 1.67 V

660

810

965

mV

250

360

1.125

1.23

14

800

MHz

450

mV

25

mV

1.375

V

25

mV

24

mA

Test Conditions/Comments

Termination = 50 Ω to VS − 2 V

Output level Register 0x3C, Register 0x3D,

Register 0x3E, Register 0x3F[3:2] = 10b

See Figure 21

Termination = 100 Ω differential; default

Output level Register 0x40, Register 0x41,

Register 0x42, Register 0x43[2:1] = 01b

3.5 mA termination current

See Figure 22

Output shorted to GND

VOH

VS − 0.1

VOL

Single-ended measurements, B outputs:

inverted, termination open

250

MHz With 5 pF load each output, see Figure 23

V

At 1 mA load

0.1

V

At 1 mA load

TIMING CHARACTERISTICS

Table 4.

Parameter

Symbol Min Typ Max Unit Test Conditions/Comments

LVPECL

Termination = 50 Ω to VS − 2 V; output level

Register 0x3C, Register 0x3D, Register 0x3E,

Register 0x3F[3:2] = 10b

Output Rise Time

tRP

130 180 ps 20% to 80%, measured differentially

Output Fall Time

tFP

130 180 ps 80% to 20%, measured differentially

PROPAGATION DELAY, CLK-TO-LVPECL OUT1 tPECL

Divide = Bypass

335 490 635 ps

Divide = 2 − 32

375 545 695 ps

Variation with Temperature

0.5

ps/°C

OUTPUT SKEW, LVPECL OUTPUTS

OUT1 to OUT0 on Same Part2

tSKP

−5 +30 +85 ps

OUT2 to OUT3 on Same Part2

tSKP

15 45 80 ps

All LVPECL OUTs on Same Part2

tSKP

90 130 180 ps

All LVPECL OUTs Across Multiple Parts3 tSKP_AB

275 ps

Same LVPECL OUT Across Multiple

Parts3

tSKP_AB

130 ps

LVDS

Termination = 100 Ω differential; output level

Register 0x40, Register 0x41, Register 0x42,

Register 0x43[2:1] = 01b; 3.5 mA termination

current

Output Rise Time

tRL

200 350 ps 20% to 80%, measured differentially

Output Fall Time

tFL

210 350 ps 80% to 20%, measured differentially

Rev. B | Page 6 of 56

Share Link: