RTL8139C Ver la hoja de datos (PDF) - Realtek Semiconductor
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RTL8139C
Realtek Semiconductor
RTL8139C Datasheet PDF : 62 Pages
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RTL8139C(L)
6.7 Transmit Configuration Register
(Offset 0040h-0043h, R/W)
This register defines the Transmit Configuration for the RTL8139C(L). It controls such functions as Loopback, Heartbeat, Auto
Transmit Padding, programmable Interframe Gap, Fill and Drain Thresholds, and maximum DMA burst size.
Bit
31
30-26
R/W
-
R
Symbol
-
HWVERID
Reserved
Hardware Version ID:
Bit30
RTL8139
1
RTL8139A
1
RTL8139A-G 1
RTL8139B
1
RTL8130
1
RTL8139C
1
Reserved
Description
Bit29 Bit28 Bit27 Bit26
1
0
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
1
1
1
1
1
0
1
All other combination
Bit23
0
0
1
0
0
0
25-24
23
22-19
18, 17
16
15-11
10-8
R/W
IFG1, 0
Interframe Gap Time: This field allows adjustment of the interframe
gap time below the standards of 9.6 us for 10Mbps, 960 ns for
100Mbps. The time can be programmed from 9.6 us to 8.4 us (10Mbps)
and 960ns to 840ns (100Mbps). Note that any value other than (1, 1)
will violate the IEEE 802.3 standard.
The formula for the inter frame gap is:
10 Mbps
8.4us + 0.4(IFG(1:0)) us
100 Mbps
840ns + 40(IFG(1:0)) ns
R
8139A-G
RTL8139A rev.G ID = 1. For others, this bit is 0.
-
-
Reserved
R/W
LBK1, LBK0 Loopback test: There will be no packet on the TX+/- lines under the
Loopback test condition. The loopback function must be independent of
the link state.
00: normal operation
01: Reserved
10: Reserved
11: Loopback mode
R/W
CRC
Append CRC:
0: A CRC is appended at the end of a packet
1: No CRC appended at the end of a packet
-
-
Reserved
R/W
MXDMA2, 1, 0 Max DMA Burst Size per Tx DMA Burst: This field sets the
maximum size of transmit DMA data bursts according to the following
table:
000 = 16 bytes
001 = 32 bytes
010 = 64 bytes
011 = 128 bytes
100 = 256 bytes
101 = 512 bytes
110 = 1024 bytes
111 = 2048 bytes
2002/01/10
16
Rev.1.4
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