AD9725 Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Lista de partido

AD9725

14-Bit, 600+ MSPS D/A Converter

Analog Devices 

Preliminary Technical Data

DEFINITIONS

Linearity Error (Also Called Integral Nonlinearity or INL)

Linearity error is defined as the maximum deviation of the

actual analog output from the ideal output, determined by a

straight line drawn from zero-scale to full-scale.

Differential Nonlinearity ( DNL)

DNL is the measure of the variation in analog value, normalized

to full-scale, and associated with a 1 LSB change in digital input

code.

Monotonicity

A D/A converter is monotonic if the output either increases or

remains constant as the digital input increases.

Offset Error

The deviation of the output current from the ideal of zero is

called offset error. For IOUTA, 0 mA output is expected when the

inputs are all 0s. For IOUTB, 0 mA output is expected when all

inputs are set to 1s.

Gain Error

The difference between the actual and ideal output span. The

actual span is determined by the output when all inputs are set

to 1s, minus the output when all inputs are set to 0s.

Output Compliance Range

The range of allowable voltage at the output of a current-output

DAC. Operation beyond the maximum compliance limits may

cause either output stage saturation or breakdown, resulting in

nonlinear performance.

Temperature Drift

Temperature drift is specified as the maximum change from the

ambient (25°C) value to the value at either TMIN or TMAX. For

offset and gain drift, the drift is reported in ppm of full-scale

range (FSR) per degree celsius. For reference drift, the drift is

reported in ppm per degree celsius.

AD9725

Power Supply Rejection

The maximum change in the full-scale output as the supplies

are varied from minimum to maximum specified voltages.

Settling Time

The time required for the output to reach and remain within a

specified error band about its final value, measured from the

start of the output transition.

Glitch Impulse

Asymmetrical switching times in a DAC give rise to undesired

output transients that are quantified by a glitch impulse. It is

specified as the net area of the glitch in pV-s.

Spurious-Free Dynamic Range

The difference, in decibels, between the rms amplitude of the

output signal and the peak spurious signal over the specified

bandwidth.

Total Harmonic Distortion

THD is the ratio of the rms sum of the first six harmonic com-

ponents to the rms value of the measured fundamental. It is

expressed as a percentage or in decibels (dB).

Signal-to-Noise Ratio (SNR)

S/N is the ratio of the rms value of the measured output signal

to the rms sum of all other spectral components below the

Nyquist frequency, excluding the first six harmonics and dc. The

value for SNR is expressed in decibels.

Adjacent Channel Power Ratio (or ACPR)

A ratio in dBc between the measured power within a channel

relative to its adjacent channel.

LVDS

Low voltage differential signaling. A differential logic specifi-

cation that defines logic levels as approximately ±350 mV

(differential) over a common mode range of 0.875 V to 1.575 V.

LVDS is designed to achieve clock rates of up to 840 MHz.

Rev. PrA | Page 11 of 16

Share Link: