ADM1041ARQ-REEL7 Ver la hoja de datos (PDF) - Analog Devices

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ADM1041ARQ-REEL7

Secondary-Side Controller with Current Share and Housekeeping

Analog Devices 

ADM1041

TABLE OF CONTENTS

Specifications..................................................................................... 6

Absolute Maximum Ratings.......................................................... 13

ESD Caution................................................................................ 13

Pin Configuration and Function Descriptions........................... 14

Terminology .................................................................................... 17

Theory of Operation ...................................................................... 19

Power Management.................................................................... 19

Gain Trimming and Configuration ......................................... 19

Differential Remote Sense Amplifier............................................ 20

Set Load Voltage.......................................................................... 20

Load Overvoltage (OV) ............................................................. 20

Local Voltage Sense .................................................................... 20

Local OverVoltage Protection (OVP)...................................... 20

Local UnderVoltage Protection (UVP) ................................... 20

False UV Clamp.......................................................................... 20

Voltage Error Amplifier ............................................................. 21

Main Voltage Reference ............................................................. 21

Current Sense Amplifier............................................................ 21

Current Sensing .......................................................................... 22

Current Transformer Input ....................................................... 22

Current Sense Calibration......................................................... 22

Current Limit Error Amplifier.................................................. 22

Overcurrent Protection ............................................................. 22

Current Share .................................................................................. 24

Current Share Offset .................................................................. 24

ISHARE Drive Amplifier................................................................. 24

Differential Sense Amplifier...................................................... 24

ISHARE Error Amplifier................................................................. 24

ISHARE Clamp................................................................................. 24

Share_ok Detector ...................................................................... 24

Pulse/ACSENSE2................................................................................. 27

Pulse ............................................................................................. 27

ACSENSE.......................................................................................... 27

OrFET Gate Drive ...................................................................... 28

Oscillator and Timing Generators ............................................... 30

Logic I/O and Monitor Pins...................................................... 30

SMBus Serial Port....................................................................... 33

Microprocessor Support............................................................ 33

Broadcasting................................................................................ 34

SMBus Serial Interface............................................................... 34

General SMBus Timing ............................................................. 34

SMBus Protocols for RAM and EEPROM.............................. 36

SMBus Read Operations ........................................................... 38

SMBus Alert Response Address (ARA)................................... 39

Support for SMBus 1.1............................................................... 39

Layout Considerations............................................................... 39

Power-Up Auto-Configuration ................................................ 39

Extended SMBus Addressing.................................................... 40

Backdoor Access ......................................................................... 40

Register Listing ............................................................................... 41

Detailed Register Descriptions ..................................................... 42

Manufacturing Data................................................................... 51

Microprocessor Support ................................................................ 52

Trim Table........................................................................................ 54

Appendix A—Configuration Table .............................................. 55

Appendix B—Test Name Table..................................................... 61

Outline Dimensions ....................................................................... 64

Ordering Guide .......................................................................... 64

REVISION HISTORY

3/04-Revision Sp0: Initial Version

5/04-Changed from Rev. Sp0 to Rev. A

Rev. A | Page 2 of 64

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