ADM1067(RevE) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

fabricante

ADM1067
(Rev.:RevE)

Super Sequencer with Open-Loop Margining DACs

Analog Devices 

Data Sheet

FEATURES

Complete supervisory and sequencing solution for up to

10 supplies

10 supply fault detectors enable supervision of supplies to

<0.5% accuracy at all voltages at 25°C

<1.0% accuracy across all voltages and temperatures

5 selectable input attenuators allow supervision of supplies to

14.4 V on VH

6 V on VP1 to VP4 (VPx)

5 dual-function inputs, VX1 to VX5 (VXx)

High impedance input to supply fault detector with

thresholds between 0.573 V and 1.375 V

General-purpose logic input

10 programmable driver outputs, PDO1 to PDO10 (PDOx)

Open-collector with external pull-up

Push/pull output, driven to VDDCAP or VPx

Open collector with weak pull-up to VDDCAP or VPx

Internally charge-pumped high drive for use with external

N-FET (PDO1 to PDO6 only)

Sequencing engine (SE) implements state machine control of

PDO outputs

State changes conditional on input events

Enables complex control of boards

Power-up and power-down sequence control

Fault event handling

Interrupt generation on warnings

Watchdog function can be integrated in SE

Program software control of sequencing through SMBus

Open-loop margining solution for 6 voltage rails

6 voltage output 8-bit DACs (0.300 V to 1.551 V) allow voltage

adjustment via dc-to-dc converter trim/feedback node

Device powered by the highest of VPx, VH for improved

redundancy

User EEPROM: 256 bytes

Industry-standard 2-wire bus interface (SMBus)

Guaranteed PDO low with VH, VPx = 1.2 V

Available in 40-lead, 6 mm × 6 mm LFCSP and

48-lead, 7 mm × 7 mm TQFP packages

APPLICATIONS

Central office systems

Servers/routers

Multivoltage system line cards

DSP/FPGA supply sequencing

In-circuit testing of margined supplies

Super Sequencer with

Open-Loop Margining DACs

ADM1067

FUNCTIONAL BLOCK DIAGRAM

REFOUT REFGND SDA SCL A1 A0

ADM1067

VREF

SMBus

INTERFACE

EEPROM

VX1

VX2

VX3

VX4

VX5

VP1

VP2

VP3

VP4

VH

AGND

VDDCA P

MUP

DUAL-

FUNCTION

INPUTS

(LOGIC INPUTS

OR

SFDs)

PROGRAMMABLE

RESET

GENERATORS

(SFDs)

SEQUENCING

ENGINE

CONFIGURABLE

OUTPUT

DRIVERS

(HV CAPABLE OF

DRIVING GATES

OF N-FET)

CONFIGURABLE

OUTPUT

DRIVERS

(LV CAPABLE

OF DRIVING

LOGIC SIGNALS)

VDD

ARBITRATOR

VOUT

DAC

VOUT

DAC

VOUT

DAC

VOUT

DAC

VOUT

DAC

VOUT

DAC

PDO1

PDO2

PDO3

PDO4

PDO5

PDO6

PDO7

PDO8

PDO9

PDO10

PDOGND

GND

VCCP

MDN

DAC1

DAC2

DAC3

DAC4

Figure 1.

DAC5

DAC6

GENERAL DESCRIPTION

The ADM1067 Super Sequencer® is a configurable supervisory/

sequencing device that offers a single-chip solution for supply

monitoring and sequencing in multiple supply systems. In addition

to these functions, the ADM1067 integrates six 8-bit voltage

output DACs. These circuits can be used to implement an open-

loop margining system that enables supply adjustment by altering

either the feedback node or reference of a dc-to-dc converter

using the DAC outputs.

For more information about the ADM1067 register map, refer

to the AN-698 Application Note.

Rev. E

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 ©2004–2015 Analog Devices, Inc. All rights reserved.

Technical Support

www.analog.com

Share Link: