ADM1033(2012) Ver la hoja de datos (PDF) - ON Semiconductor
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ADM1033 Datasheet PDF : 35 Pages
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1
SCL
ADM1033
9
1
9
SDA
A6
START BY
MASTER
A5 A4 A3 A2 A1 A0
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
ADM1033
D6 D5 D4 D3 D2 D1 D0
FRAME 2
ADDRESS POINTER REGISTER BYTE
ACK. BY
ADM1033
STOP BY
MASTER
Figure 18. Writing to the Address Pointer Register Only (Send Byte)
1
9
1
9
SCL
SDA
A6 A5 A4 A3 A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
ACK. BY
ADM1033
FRAME 2
DATA BYTE FROM ADM1033
NO ACK. BY STOP BY
ADM1033 MASTER
Figure 19. Reading Data from a Previously Selected Register
Register Addresses for Single/Block Byte Modes
The ADM1033 supports single byte as well as block read
and write operations. The register address determines
whether a single byte or multiple byte (block) operation is
run. For a single byte operation, the MSB of the register
address is set to 0; for a multiple byte operation, it is set to 1.
The number of bytes read in a multiple byte operation is set
in the #Bytes/Block Read Register at Address 0x00. The
number of bytes written to the ADM1033 is specified during
the block write operation. The addresses quoted in the
register map and throughout this data sheet assume single
byte operation. For multiple byte operations, set the MSB of
each register address to 1.
Write Operations
The SMBus specifications define protocols for read and
write operations. The ADM1033 supports send byte, write
byte, and block byte SMBus write protocols. The following
abbreviations are used in the diagrams:
S − START
P − STOP
R − READ
W − WRITE
A − ACKNOWLEDGE
A − NO ACKNOWLEDGE
Send Byte
In this operation, the master device sends a
single-command byte to a slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends a 7-bit address followed by the
write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends the register address.
5. The slave asserts ACK on SDA.
6. The master asserts a stop condition on SDA, and
the transaction ends.
S
SLAVE
ADDRESS
WA
REG
ADDRESS
A
P
Figure 20. Send Byte
The ADM1033 uses the send byte operation to write a
register address to the APR for a subsequent read from the
same address. (See Figure 24). The user may be required to
read data from the register immediately after setting up the
address. If so, the master can assert a repeat start condition
immediately after the final ACK and carry out a single byte
read without asserting an intermediate stop condition.
Write Byte
In this operation, the master device sends a register
address and one data byte to the slave device as follows:
1. The master asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by a write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends the register address. The MSB of
the register address should equal 0 for a write byte
operation. If the MSB equals 1, a block write
operation takes place.
5. The slave asserts ACK on SDA.
6. The master sends a data byte.
7. The slave asserts ACK on SDA.
8. The master asserts a stop condition on SDA to end
the transaction.
S
SLAVE
ADDRESS
WA
REG
ADDRESS
A
DATA
AP
Figure 21. Write Byte Operation
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