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ADM3483EARZ Ver la hoja de datos (PDF) - Analog Devices

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ADM3483EARZ Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
GENERAL DESCRIPTION
(continued from Page 1)
The driver outputs of the ADM3483E/ADM3486E/
ADM3488E are slew rate limited, in order to reduce EMI
and data errors caused by reflections from improperly
terminated buses. The receiver has a fail-safe feature that
ensures a logic high output when the inputs are floating.
Excessive power dissipation caused by bus contention
or by output shorting is prevented with a thermal shut-
down circuit.
The parts are fully specified over the industrial temperature range
and are available in 8-lead and 14-lead narrow SOIC packages.
Table 1. Selection Table
Part No.
Guaranteed Data
Rate (Mbps)
ADM3483E 0.25
ADM3486E 2.5
ADM3488E 0.25
ADM3490E 12
ADM3491E 12
Supply
Voltage (V)
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
Half/Full
Duplex
Half
Half
Full
Full
Full
Slew Rate
Limited
Yes
Yes
Yes
No
No
Driver/Receiver
Enable
Yes
Yes
No
No
Yes
±15 kV ESD Protection
on Bus Pins
Yes
Yes
Yes
Yes
Yes
Pin Count
8
8
8
8
14
Rev. A | Page 3 of 20

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