EVAL-ADN2804EB(Rev0) Ver la hoja de datos (PDF) - Analog Devices

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EVAL-ADN2804EB
(Rev.:Rev0)

622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier

Analog Devices 

ADN2804

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Jitter Specifications....................................................................... 4

Output and Timing Specifications ............................................. 5

Absolute Maximum Ratings............................................................ 6

Thermal Characteristics .............................................................. 6

ESD Caution.................................................................................. 6

Timing Characteristics..................................................................... 7

Pin Configuration and Function Descriptions............................. 8

Typical Performance Characteristics ............................................. 9

I2C Interface Timing and Internal Register Description........... 10

Terminology .................................................................................... 12

REVISION HISTORY

2/06—Revision 0: Initial Version

Jitter Specifications......................................................................... 13

Theory of Operation ...................................................................... 14

Functional Description.................................................................. 16

Frequency Acquisition............................................................... 16

Limiting Amplifier ..................................................................... 16

Slice Adjust.................................................................................. 16

Loss-of-Signal (LOS) Detector ................................................. 16

Lock Detector Operation .......................................................... 17

SQUELCH Modes ...................................................................... 17

I2C Interface ................................................................................ 17

Reference Clock (Optional) ...................................................... 19

Applications Information .............................................................. 21

PCB Design Guidelines ............................................................. 21

DC-Coupled Application .......................................................... 23

Outline Dimensions ....................................................................... 24

Ordering Guide .......................................................................... 24

Rev. 0 | Page 2 of 24

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