ADP1173 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Lista de partido
ADP1173 Datasheet PDF : 16 Pages
| |||
ADP1173
The internal structure of the ILIM circuit is shown in Figure 21.
Q1 is the ADP1173’s internal power switch, which is paralleled
by sense transistor Q2. The relative sizes of Q1 and Q2 are
scaled so that IQ2 is 0.5% of IQ1. Current flows to Q2 through an
internal 80 Ω resistor and through the RLIM resistor. These two
resistors parallel the base-emitter junction of the oscillator-
disable transistor, Q3. When the voltage across R1 and RLIM
exceeds 0.6 V, Q3 turns on and terminates the output pulse. If
only the 80 Ω internal resistor is used (i.e., the ILIM pin is con-
nected directly to VIN), the maximum switch current will be
1.5 A. Figures 4 and 5 gives RLIM values for lower current-limit
values.
ILIM
RLIM
(EXTERNAL)
VIN
80Ω
R1 (INTERNAL)
Q3
SW1
DRIVER
OSCILLATOR
Q2
Q1
SW2
Figure 21. Current Limit Operation
The delay through the current limiting circuit is approximately
2 µs. If the switch ON time is reduced to less than 4 µs, accu-
racy of the current trip-point is reduced. Attempting to program
a switch ON time of 2 µs or less will produce spurious responses
in the switch ON time. However, the ADP1173 will still provide
a properly regulated output voltage.
PROGRAMMING THE GAIN BLOCK
The gain block of the ADP1173 can be used as a low-battery
detector, error amplifier or linear post regulator. The gain block
consists of an op amp with PNP inputs and an open-collector
NPN output. The inverting input is internally connected to the
ADP1173’s 1.245 V reference, while the noninverting input is
available at the SET pin. The NPN output transistor will sink
about 100 µA.
VBAT
+5V
2
R1 ADP1173
VIN
100kΩ
1.245V
SET REF
7
AO
6
TO
PROCESSOR
GND
R2
5
R1 = VLB –1.245V
12.5µA
VLB = BATTERY TRIP POINT
R2 = 100kΩ
Figure 22. Setting the Low Battery Detector Trip Point
Figure 22 shows the gain block configured as a low battery
monitor. Resistors R1 and R2 should be set to high values to
reduce quiescent current, but not so high that bias current in the
SET input causes large errors. A value of 100 kΩ for R2 is a
good compromise. The value for R1 is then calculated from the
formula:
R1 = V LOBATT − 1.245 V
1.245 V
R2
where VLOBATT is the desired low battery trip point. Since the
gain block output is an open-collector NPN, a pull-up resistor
should be connected to the positive logic power supply.
VBAT
5V
2
R1
ADP1173
VIN
47kΩ
1.245mV
SET REF
7
AO
6
TO
PROCESSOR
GND
R2
5
R3
1.6MΩ
Figure 23. Adding Hysteresis to the Low Battery Detector
REV. 0
–11–
Share Link: 