EVAL-ADT7483EB Ver la hoja de datos (PDF) - ON Semiconductor
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EVAL-ADT7483EB Datasheet PDF : 24 Pages
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ADT7483A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADD1 1
VDD 2
D1+ 3
D1– 4
THERM 5
GND 6
NC 7
NC 8
16 ADD0
15 SCLK
ADT7483A
TOP VIEW
(Not to Scale)
14 SDATA
13 ALERT/THERM2
12 D2+
11 D2–
10 NC
9 NC
NC = NO CONNECT
Figure 3.16-Lead QSOP Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic
Description
1
ADD1
Address 1 Pin. Tri-state input to set the SMBus address.
2
VDD
3
D1+
Positive Supply, 3 V to 3.6 V.
Positive Connection. Connects to the first remote temperature sensor.
4
D1−
Negative Connection. Connects to the first remote temperature sensor.
5
THERM
Open-Drain Output. Turns a fan on/off, or throttles a CPU clock in the event of an overtemperature
condition.
6
GND
Supply Ground Connection.
7
NC
No Connect.
8
NC
No Connect.
9
NC
No Connect.
10
NC
No Connect.
11
D2−
Negative Connection. Connects to the second remote temperature sensor.
12
D2+
Positive Connection. Connects to the second remote temperature sensor.
13
ALERT/THERM2 Open-Drain Logic Output. Used as interrupt or SMBus alert. This may also be configured as a second THERM
output. Requires a pull-up resistor.
14
SDATA
Logic Input/Output, SMBus Serial Data. Open-drain output. Requires a pull-up resistor.
15
SCLK
Logic Input, SMBus Serial Clock. Requires a pull-up resistor.
16
ADD0
Address 0 Pin. Tri-state input to set the SMBus address.
Rev. 1 | Page 6 of 24 | www.onsemi.com
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