ADV7197 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Lista de partido
ADV7197 Datasheet PDF : 20 Pages
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Pin
1, 12
2–11
13, 52
14–23
Mnemonic
VDD
Y0–Y9
GND
Cr0–Cr9
24, 35
25
26, 33
27
28
29
VAA
CLKIN
AGND
DV
VSYNC/
TSYNC
HSYNC/
SYNC
30
SCL
31
SDA
32
DAC C
34
DAC A
36
DAC B
37
COMP
38
RSET
39
VREF
40
RESET
41
ALSB
42–51 Cb/Cr9–0
ADV7197
PIN FUNCTION DESCRIPTIONS
Input/Output
P
I
G
I
P
I
G
I
I
Function
Digital Power Supply.
10-Bit HDTV Input Port for Y Data. G data input in RGB mode.
Digital Ground
10-Bit HDTV Input Port for Color Data in 4:4:4 Input Mode. In 4:2:2 mode this
input port is not used. R data input in RGB mode.
Analog Power Supply.
Pixel Clock Input. Requires a 74.25 MHz (74.1758 MHz) reference clock.
Analog Ground
Video Blanking Control Signal Input.
VSYNC, vertical sync control signal input or TSYNC input control signal in
Async Timing Mode.
I
HSYNC, horizontal sync control signal input or SYNC input control signal in
Async Timing Mode.
I
MPU Port Serial Interface Clock Input.
I/O
MPU Port Serial Data Input/Output.
O
Color component analog output of input data on Cb/Cr9–0 input pins.
O
Y Analog Output.
O
Color component analog output of input data on Cr9–Cr0 input pins.
O
Compensation Pin for DACs. Connect 0.1 µF Capacitor from COMP pin to VAA.
I
A 2470 Ω resistor (for input ranges 64–940 and 64–960, output standards
EIA-770.3) must be connected from this pin to ground and is used to control the
amplitudes of the DAC outputs. For input ranges 0–1023 (output standards
RS-170, RS-343A) the RSET value must be 2820 Ω.
I/O
Optional External Voltage Reference Input for DACs or Voltage Reference
Output (1.235 V).
I
This input resets the on-chip timing generator and sets the ADV7197 into Default
Register setting. Reset is an active low signal.
I
TTL Address Input. This signal sets up the LSB of the MPU address. When this
pin is tied high, the I2C filter is activated which reduces noise on the I2C interface.
When this pin is tied low, the input bandwidth on the I2C interface is increased.
I
10-Bit HDTV Input Port for Color Data. In 4:2:2 mode the multiplexed CrCb
data must be input on these pins. B data input in RGB mode.
REV. 0
–9–
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