PDM41257SA10SOTR Ver la hoja de datos (PDF) - Paradigm Technology
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PDM41257SA10SOTR Datasheet PDF : 7 Pages
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Read Cycle No. 1(1)
t RC
ADDR
DOUT
tAA
t OH
PREVIOUS DATA VALID
DATA VALID
PDM41257
1
2
3
Read Cycle No. 2(2)
4
tRC
ADDR
tAA
tACE
5
CE
tLZCE
tHZCE
DOUT
tLZOE
tAOE
tHZOE
DATA VALID
6
7
AC Electrical Characteristics
8
Description
-7(6)
-8(6)
-10(6)
-12
-15
READ Cycle
Sym
READ cycle time
Address access time
Chip enable access time
Output hold from address change
Chip enable to output in low Z(3, 4, 5)
Chip disable to output in high Z(3, 4, 5)
Chip enable to power up time(4)
Chip disable to power down time(4)
tRC
tAA
tACE
tOH
tLZCE
tHZCE
tPU
tPD
SHADED AREA = PRELIMINARY DATA.
Notes referenced are after Data Retention Table.
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units
7
8
10
12
15
ns
7
8
10
12
15 ns
7
8
10
12
15 ns
3
3
3
3
3
ns
5
5
5
5
5
ns
5
5
10
10
10 ns
0
0
0
0
0
ns
7
8
10
12
15 ns
9
10
11
12
Rev. 2.2 - 4/27/98
5
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