AM79C961A(1996) Ver la hoja de datos (PDF) - Advanced Micro Devices

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AM79C961A
(Rev.:1996)

PCnet™-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA

Advanced Micro Devices 

PRELIMINARY

on 3 LED outputs. One LED (LED0) is dedicated to dis-

playing 10BASE-T Link Status. The status signals

available are Collision, Jabber, Receive, Receive Polar-

ity, Transmit, Receive Address Match, and Full Duplex

Link Status. If more than one status signal is enabled,

they are ORed together. An optional pulse stretcher is

available for each programmable output. This allows

emulation of the TPEX (Am79C98) and TPEX+

(Am79C100) LED outputs.

Signal

Behavior

COL

Active during collision activity on the network

FDLS

Active when Full Duplex operation is enabled

and functioning on the selected network port

JAB

Active when the PCnet-ISA II is jabbering on

the network

LNKST

Active during Link OK Not active during Link

Down

RCV

Active while receiving data

RVPOL

Active during receive polarity is OK Not active

during reverse receive polarity

RCVADDM Active during Receive with Address Match

XMT

Active while transmitting data

Each status signal is ANDed with its corresponding

enable signal. The enabled status signals run to a com-

mon OR gate:

FDLS

FDLSE

RCVM

RCVM E

XMT

XMT E

RVPOL

RVPOL E

RCV

RCV E

JAB

JAB E

COL

COL E

RCVADDM

RCVADDE

AND

AND

AND

AND

To

OR

Pulse

Stretcher

AND

AND

AND

AND

LED Control Logic

19364A-18

The output from the OR gate is run through a pulse

stretcher, which consists of a 3-bit shift register clocked

at 38 Hz. The data input of the shift register is at logic

0. The OR gate output asynchronously sets all three

bits of the shift register when its output goes active. The

output of the shift register controls the associated LEDx

pin. Thus, the pulse stretcher provides an LED output

of 52 ms to 78 ms.

Refer to the section “ISA Bus Configuration Registers”

for information on LED control via the ISACSRs.

Am79C961A

85

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