AOZ1037 Ver la hoja de datos (PDF) - Alpha and Omega Semiconductor
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AOZ1037 Datasheet PDF : 14 Pages
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AOZ1037
where;
fC is the desired crossover frequency. For best performance,
fC is set to be about 1/10 of the switching frequency;
VFB is 0.8V,
GEA is the error amplifier transconductance, which is 200 x 10-6
A/V, and
GCS is the current sense circuit transconductance, which is 6.68
A/V
The compensation capacitor CC and resistor RC together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected
crossover frequency. C2 can is selected by:
CC
=
--------------1---.--5---------------
2π × R3 × fP1
The above equation can be simplified to:
CC
=
C-----O-----×-----R-----L-
R3
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1037 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the low-side NMOSFET.
Current flows in the second loop when the low-side
NMOSFET is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input
capacitor, output capacitor, and PGND pin of the
AOZ1037.
In the AOZ1037 buck regulator circuit, the major power
dissipating components are the AOZ1037 and the output
inductor. The total power dissipation of converter circuit
can be measured by input power minus output power.
Ptotal_loss = VIN × IIN – VO × IO
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
Pinductor_loss = IO2 × Rinductor × 1.1
The actual junction temperature can be calculated with
power dissipation in the AOZ1037 and thermal
impedance from junction to ambient.
Tjunction = (Ptotal_loss–Pinductor_loss) × ΘJA
The maximum junction temperature of AOZ1037 is
150°C, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1037 under different ambient
temperature.
The thermal performance of the AOZ1037 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
The AOZ1037 is an exposed pad SO-8 package. Layout
tips are listed below for the best electric and thermal
performance.
1. The exposed pad LX pins are connected to internal
PFET and NFET drains. Connect a large copper
plane to the LX pins to help thermal dissipation.
2. Do not use thermal relief connection to the VIN
and the PGND pin. Pour a maximized copper area
to the PGND pin and the VIN pin to help thermal
dissipation.
3. Input capacitor should be connected as close as
possible to the VIN pin and the PGND pin to reduce
the LX voltage over-shoot. This is especially impor-
tant for VIN >16V.
4. A ground plane is suggested. If a ground plane is
not used, separate PGND from AGND and connect
them only at one point to avoid the PGND pin noise
coupling to the AGND pin.
5. Make the current trace from the LX pins to L to CO to
the PGND as short as possible.
6. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or VOUT.
Rev. 1.1 September 2010
www.aosmd.com
Page 11 of 14
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