MSM7534 Ver la hoja de datos (PDF) - Oki Electric Industry

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MSM7534

2ch Single Rail CODEC

Oki Electric Industry 

¡ Semiconductor

MSM7533H/7533V/7534

CHPS

Control signal input for the mode selection of PCM input and output.

When this signal is at a logic "1" level, the PCM input and output are in the parallel mode. The

PCM data of CH1 and CH2 is input to DIN1 and DIN2, and output from DOUT1 and DOUT2

with the same timing.

When this signal is at a logic "0" level, the PCM input and output is in the serial mode. The PCM

data of CH1 and CH2 is input to DIN2 and output from DOUT1 as time division multiplexed

data.

The parallel mode is conveniently applied to the digital interface to the echo canceller (MSM7520),

and the serial mode is applied to the digital interface to PCM multiplexer's for PABXs.

PDN

Power down control signal.

When PDN is at a logic "0" level, both transmit and receive circuits are in a power down state.

AG

Analog signal ground.

DG

Ground for the digital signal circuits.

This ground is separate from the analog signal ground. The DG pin must be connected to the AG

pin on the printed circuit board to make a common analog ground.

SGC

Used to generate the signal ground voltage level by connecting a bypass capacitor.

Connect a 0.1 mF capacitor with excellent high frequency characteristics between the AG pin and

the SGC pin.

ALAW

Control signal input of the companding law selection.

Provides only for the MSM7533VRS/MSM7533VGS-K. The CODEC will operate in the m-law

when this pin is at a logic "0" level and the CODEC will operate in the A-law when this pin is at

a logic "1" level. The CODEC operates in the m-law if the pin is left open, since this pin is internally

pulled down.

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