APL5316(2008) Ver la hoja de datos (PDF) - Anpec Electronics
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APL5316 Datasheet PDF : 15 Pages
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APL5316
Application Information
Input Capacitor
The APL5316 requires proper input capacitors to supply
surge current during stepping load transients to prevent
the input rail from dropping. Because the parasitic induc-
tor from the voltage sources or other bulk capacitors to
the VIN limits the slew rate of the surge current, it is
recommeded to place the Input capacitors near VIN as
close as possible. Input capacitors should be larger than
1µF and a minimum ceramic capacitor of 1µF is
necessary.
Output Capacitor
The APL5316 needs a proper output capacitor to main-
tain circuit stability and improve transient response over
temperature and current. In order to insure the circuit
stability, the proper output capacitor value should be larger
than 2.2µF. With X5R and X7R dielectrics, 2.2µF is suffi-
cient at all operating temperatures. Large output capaci-
tor value can reduce noise and improve load-transient
response and PSRR, however, it also affects power on
issue. Equation (1) shows the relationship between the
maximum C value and V .
OUT
OUT
COUT(max) = 31- 6 ...............................(1)
VOUT
Where the unit of COUT is µF and VOUT is V. Figure 1 shows
the curve of maximum output capacitor over the output
voltage. The output voltage range is from 0.8 to 5.5V and
the output capacitor value should be under the line. Out-
put capacitors must be placed at the load and ground pin
as close as possible and the impedance of the layout
must be minimized.
31
28
Operation Region and Power dissipation
The APL5316 maximum power dissipation depends
on the thermal resistance and temperature difference
between the die junction and ambient air. The power dis-
sipation PD across the device is:
PD = (TJ - TA) / θJA
where (TJ-TA) is the temperature difference between the
junction and ambient air. θJA is the thermal resistance
between Junction and ambient air. Assuming the
T =25oC and maximum T =160oC (typical thermal limit
A
J
threshold), the maximum power dissipation is calcu-
lated as:
P =(160-25)/240
D(max)
= 0.56(W)
For normal operation, do not exceed the maximum junc-
tion temperature rating of TJ = 125 oC. The calculated power
dissipation should be less than:
PD =(125-25)/240
= 0.41(W)
The GND provides an electrical connection to ground and
channels heat away. Connect the GND to ground by
using a large pad or ground plane.
Layout Consideration
Figure 2 illustrates the layout. Below is a checklist for
your layout:
1. Please place the input capacitors close to the VIN.
2. Ceramic capacitors for load must be placed near
the load as close as possible.
3. To place APL5316 and output capacitors near the
load is good for performance.
4. Large current paths, the bold lines in figure 2,
must have wide tracks.
25
22
0
1
2
3
4
5
6
Output voltage (V)
Figure 1
Copyright © ANPEC Electronics Corp.
10
Rev. A.2 - Aug, 2008
www.anpec.com.tw
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