datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga

APW7015 Ver la hoja de datos (PDF) - Anpec Electronics

Número de pieza
componentes Descripción
Lista de partido
APW7015 Datasheet PDF : 6 Pages
1 2 3 4 5 6
APW7015
Functional Pin Description (Cont.)
SS (Pin 10)
COMP and FB (Pin 17, and 18)
Connect a capacitor from this pin to ground. This
capacitor, along with an internal 28mA current source,
sets the soft-start interval of the converter.
FAULT (Pin 11)
This pin provides oscillator switching frequency
adjustment. By placing a resistor (RT) from this pin to
GND, the nominal 200kHz switching frequency is in-
creased according to the following equation:
Fs =200kHz + 5 ´ 10 6 / RT (kW) (RT to GND)
Conversely, connecting a resistor from this pin to VCC
reduces the switching frequency according to the fol-
lowing equation:
Fs =200kHz + 4 ´ 10 7 / RT (kW) (RT to 12V)
Nominally, the voltage at this pin is 1.26V. In the event
of an over-voltage or over-current condition, this pin
is internally pulled to VCC.
VAUX (Pin 13)
COMP and FB are the available external pins of the
PWM converter error amplifier. The FB pin is the in-
verting input of the error amplifier. Similarly, the COMP
pin is the error amplifier output. These pins are used
to compensate the voltage-mode control feedback
loop of the synchronous PWM converter.
VSEN1 (Pin 19)
This pin is connected to the PWM converter’s output
voltage. The PGOOD and OVP comparator circuits
use this signal to report output voltage status and for
over- voltage protection.
OCSET (Pin 20)
Connect a resistor from this pin to the drain of the
respective upper MOSFET. This resistor, an internal
200µA current source, and the upper MOSFET’s on-
resistance set the converter over-current trip point.
An over-current trip cycles the soft-start function.
The voltage at this pin is monitored for power-on re-
set (POR) purposes and pulling this pin low with an
open drain device will shutdown the IC.
This pin provides boost current for the linear
regulator’s output drives in the event bipolar NPN tran-
sistors (instead of N-channel MOSFETs) are em-
ployed as pass elements. The voltage at this pin is
monitored for power-on reset purposes.
PGND (Pin 21)
This is the power ground connection. Tie the syn-
chronous PWM converter’s lower MOSFET source
to this pin.
GND (Pin 14)
LGATE (Pin 22)
Signal ground for the IC. All voltage levels are mea-
sured with respect to this pin.
DRIVE3 (Pin 15)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the FBVDDQ
regulator’s pass transistor.
VSEN3 (Pin 16)
Connect this pin to a resistor divider to set the linear
regulator (FBVDDQ) output voltage.
Connect LGATE to the PWM converter’s lower
MOSFET gate. This pin provides the gate drive for
the lower MOSFET.
PHASE (Pin 23)
Connect the PHASE pin to the PWM converter’s up-
per MOSFET source. This pin represents the gate
drive return current path and is used to monitor the
voltage drop across the upper MOSFET for over-cur-
rent protection.
Copyright ANPEC Electronics Corp.
5
Rev. P.1 - Mar., 2000
www.anpec.com.tw

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]