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APW703615KC-TU Ver la hoja de datos (PDF) - Anpec Electronics

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Lista de partido
APW703615KC-TU
Anpec
Anpec Electronics Anpec
APW703615KC-TU Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
APW7036
Functional Pin Description Cont.
(OC) trip point according to the following equation:
I=
PEAK
IOCSET * ROCSET
rDS(ON)
synchronous PWM regulator error amplifier. The FB1
pin is the inverting input of the error amplifier. Simi-
larly , the COMP pin is the error amplifier output. These
pins are used to compensate the voltage-mode con-
trol feedback loop of the synchronous PWM converter.
An over-current trip cycles the soft-start function.
VSEN (Pin 16)
FB2 (Pin 7)
This pin provides the feedback for the non-synchro-
nous switching regulator. A resistor driver is con-
nected from this pin to regulator output and GND that
sets the output voltage. The value of the resistor con-
nected from regulator output to FB2 must be less than
150Ω .
SS (Pin 8)
This pin is connected to the synchronous PWM
converterss output voltage. The PGOOD and OVP
comparator circuits use this signal to report output
voltage status and for over-voltage protection.
PGND (Pin 18)
This is the power ground connection. Tie the syn-
chronous PWM converters lower MOSFET source to
this pin.
Connect a capacitor from this pin to ground. This
capacitor , along with an internal 28µA current source
, sets the soft-start interval of the converter.
FAULT / RT (Pin 9)
LGATE (Pin19)
Connect LGATE to the synchronous PWM converters
lower MOSFET gate. This pin provides the gate drive
for the lower MOSFET.
This pin provides oscillator switching frequency
adjustment. By placing a resistor (RT ) from this pin
to GND , the nominal 200kHz switching frequency is
increased. Conversely , connecting a pull-up resistor
(RT ) from this pin to VCC reduces the switching
frequency.
Nominally , the voltage at this pin is 1.26V. In the
event of an over-voltage or over-current condition , this
pin is internally pulled to VCC.
PHASE1 (Pin 20)
Connect the PHASE1 pin to the synchronous PWM
converters upper MOSFET source. This pin is used
to monitor the voltage drop across the upper MOSFET
for over-current protection.
VAUX (Pin 11)
The +3.3V input voltage at this pin is monitored for
power-on reset (POR) purposes.
GND (Pin 12)
Signal ground for the IC. All voltage levels are mea-
sured with respect to this pin.
COMP and FB1 (Pins 14 , and 15)
COMP and FB1 are the available external pins of the
Copyright ANPEC Electronics Corp.
5
Rev. A.1 - May, 2001
www.anpec.com.tw

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