MB40C348PFV Ver la hoja de datos (PDF) - Fujitsu

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fabricante

MB40C348PFV

3 ch 8-bit 100 MSPS A/D Converter

Fujitsu 

MB40C348

s TIMING DIAGRAM

• Straight Output Mode (Timing Diagram 1)

VIHD

HSYNC input

VILD

VOHD

CLK output

CLKB output

VOLD

VOHD

DSYNC output

VOLD

VOHD

ADCLKA output

VOLD

VOHD

ADCLKB output

VOLD

ADIN input

VOHD

DA0 to DA7 output

VOLD

VOHD

DB0 to DB7 output

VOLD

VOHD

OF output

VOLD

tpd (HSYNC-CLK)

tpd (CLK-DSYNC)

tpd (CLK-ADCLK1)

N

N+1 N+2 N+3 N+4 N+5 N+6 N+7 N+8 N+9

tAD

tpd (CLK-DATA1)

X

X

X

X

X

X

X

X

N N+1 N+2 N+3

ALL “L” fix

X

X

X

X

X

X

X

X

N N+1 N+2 N+3

• ADIN input : Sampling at CLK rising (at CLKB falling)

• DA0 to DA7 : Output (after 5CLK + tpd(CLK−DATA1) from sampling) at CLK rising (at CLKB falling)

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