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AV3843A

CURRENT MODE PWM CONTROL CIRCUITS

Avic Technology 

@vic AV3842A / 3843A LINEAR INTEGRATED CIRCUIT

PARAMETER

Maximum Duty Cycle

Minimum Duty Cycle

Total Standby Current

SYMBOL

D(MAX)

D(MIN)

TEST CONDITIONS

MIN TYP MAX UNIT

95

97 100 %

0

%

Start-up Current

IST

Operating Supply Current

ICC(opr)

Vpin 2=Vpin 3=0V

Vcc Zener Voltage

Vz

Icc=25mA

note 2:These parameters, although guaranteed ,are not 100% tested in production.

note 3:Parameters measured at trip point of latch with Vpin 2=0.

note 4:Gain defined as:

∆Vpin 1

A=

; 0<=Vpin3<=0.8V

∆Vpin 3

note 5:Adjust Vcc above the start threshold before setting at 15V.

0.12 0.3 mA

11

17 mA

34

V

OPEN-LOOP LABORATORY TEST FIXTURE

RT

1

8

Error Amp

2

7

Adjust

3

6

5kΩ

4

5

CT

A

1kΩ

/ 1W

Vref

Vcc

OUTPUT

High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass

capacitors should be connected close to pin 5 in single point GND. The transistor and 5kΩ potentio-meter are used

to sample the oscillator waveform and apply an adjustable Ramp to Pin 3.

UNDER-VOLTAGE LOCKOUT

Vcc

7

ON/OFF Command

to rest of IC

Icc

<15mA

Von=16V

Voff=10V

<1mA

Voff

Von

Vcc

During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin 6 should be shunt to

GND with a bleeder resistor to prevent activating the power switch with output leakage currents.

QW-R103-002,B

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