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74HC137

3-to-8 line decoder/demultiplexer with address latches; inverting

Philips Electronics 

Philips Semiconductors

3-to-8 line decoder/demultiplexer with

address latches; inverting

AC WAVEFORMS

Product specification

74HC/HCT137

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.6 Waveforms showing the address input (An) and

enable inputs (E2) to output (Yn) propagation

delays and the output transition times.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.7 Waveforms showing the enable input (E1, LE)

to output (Yn) propagation delays and the

output transition times.

The shaded areas indicate when the input is permitted

to change for predictable output performance.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.8 Waveforms showing the data set-up, hold times for An input to LE input and the latch enable pulse width.

APPLICATION INFORMATION

December 1990

Fig.9 6-to-64 line decoder with input address storage.

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