PI6C39912-5J Ver la hoja de datos (PDF) - Pericom Semiconductor Corporation
Número de pieza
componentes Descripción
Lista de partido
PI6C39912-5J
Pericom Semiconductor Corporation
PI6C39912-5J Datasheet PDF : 11 Pages
| |||
PI6C39911/PI6C39912
3.3V High Speed LVTTL or Balanced Output
11223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122P3344r5566o77g8899r00a1122m3344m556677a88b9900l11e2211S2233k44e5566w7788C990011l22o33c44k556677B8899u0011f22f33e44r5566-7788S99u0011p2211e22r33C4455l66o7788c99k0011®22
Switching Characteristics (Over the Operating Range)(2,7)
Parameter
Description
fNOM(1,2)
Operating
Clock Frequency
in MHz
FS = LOW(1,2)
FS = MID(1,2)
FS = HIGH(1,2,19)
PI6C39911-2
PI6C39912-2
Min. Typ. Max.
12.5
30
25
50
40
135
tRPWH REF Pulse Width HIGH
3.0
tRPWL REF Pulse Width LOW
3.0
tU
Programmable Skew Unit
See Table 1
tSKEWPR
tSKEW0
tSKEW1
Zero Output Matched
-Pair Skew (XQ0, XQ1)(9,10)
Zero Output Skew (All Outputs)(9,11)
Output Skew (Rise-Rise, Fall-Fall,
Same Class Outputs)(9,13)
0.1 0.25
0.20 0.25
0.4 0.5
tSKEW2
Output Skew (Rise-Fall, Nominal-Inverted,
Divided-Divided)(9,13)
0.6 0.8
tSKEW3
Output Skew (Rise-Rise, Fall-Fall,
Different Class Outputs)(9,13)
0.4 0.5
tSKEW4
tDEV
Output Skew (Rise-Fall, Nominal-Divided,
Divided-Inverted)(9,13)
Device-to-Device Skew (8,14)
0.5 0.8
1.0
tPD
tODCV
tPWH
tPWL
tORISE
tOFALL
tLOCK
tJR
Propagation Delay, REF Rise to FB Rise 0.3
Output Duty Cycle Variation (15)
0.7
Output HIGH Time Deviation from 50%(16)
Output LOW Time Deviation from 50%(16)
Output Rise Time(16,17)
0.15
Output Fall Time(16,17)
0.15
PLL Lock Time(18)
Cycle-to-cycle
Output Jitter
RMS(8)
Peak-to-peak(8)
0.0 +0.3
0.0 +0.7
2.5
3.0
1.0 1.5
1.0 1.5
0.5
25
200
PI6C39911-5
PI6C39912-5
Min. Typ. Max.
12.5
30
25
50
40
135
3.0
3.0
See Table 1
0.1 0.25
0.25 0.5
0.6 0.7
0.5 1.0
0.5 0.7
0.5 1.0
1.25
0.5 0.0 +0.5
1.0 0.0 +1.0
2.5
3.0
0.15 1.0 1.5
0.15 1.0 1.5
0.5
25
200
PI6C39911
PI6C39912 Units
Min. Typ. Max.
12.5
30
25
50 MHz
40
135
3.0
ns
3.0
See Table 1
0.1 0.25
0.3 0.75
0.6 1.0
1.0 1.5
0.7 1.2
ns
1.2 1.7
1.65
0.7 0.0 +0.7
1.2 0.0 +1.2
3.0
3.5
0.15 1.0 1.5
0.15 1.0 1.5
0.5 ms
25
ps
200
Notes:
9. SKEW is defined as the time between the earliest and the latest output transition among all outputs for which the same tU delay has been
selected when all are loaded with 30pF and terminated with 50 ohms to VCC/2.
10. tSKEWPR is defined as the skew between a pair of outputs (XQ0 and XQ1) when all eight outputs are selected for 0tU.
11. tSKEW0 is defined as the skew between outputs when they are selected for 0tU. Other outputs are divided or inverted but not shifted.
12. CL = 0pF. For CL = 30pF, tSKEW0 = 0.35ns.
13. There are three classes of outputs: Nominal (multiple of tU delay), Inverted (4Q0 and 4Q1 only with 4F0 = 4F1 = HIGH), and Divided (3Qx
and 4Qx only in Divide-by-2 or Divide-by-4 mode).
14. tDEV is the output-to-output skew between any two devices operating under the same conditions (VCC ambient temperature, air flow, etc.)
15. tODCV is the deviation of the output from a 50% duty cycle. Output pulse width variations are included in tSKEW2 andtSKEW4 specifications.
16. Specifiedwithoutputsloadedwith30pFforthePI6C39911andPI6C39912devices.Devicesareterminatedthrough50OhmtoVCC/2.tPWH
is measured at 2.0V. tPWL is measured at 0.8V.
17. tORISE and tOFALL measured between 0.8V and 2.0V.
18. tLOCK is the time that is required before synchronization is achieved. This specification is valid only after VCC is stable and within normal
operating limits. This parameter is measured from the application of a new signal or frequency at REF or FB until tPD is within specified limits.
19. For frequencies higher than 110MHz output load should be less than 15pF to meet package thermal requirement.
5
PS8497A 04/10/01
Share Link: