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MAX2602ESA Ver la hoja de datos (PDF) - Maxim Integrated

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MAX2602ESA Datasheet PDF : 6 Pages
1 2 3 4 5 6
3.6V, 1W RF Power Transistors
for 900MHz Applications
__________Applications Information
Optimum Port Impedance
The source and load impedances presented to the
MAX2601/MAX2602 have a direct impact upon its gain,
output power, and linearity. Proper source- and load-
terminating impedances (ZS and ZL) presented to the
power transistor base and collector will ensure optimum
performance.
For a power transistor, simply applying the conjugate of
the transistor’s input and output impedances calculated
from small-signal S-parameters will yield less than opti-
mum device performance.
For maximum efficiency at VBB = 0.75V and VCC =
3.6V, the optimum power-transistor source and load
impedances (as defined in Figure 3) are:
At 836MHz: ZS = 5.5 + j2.0
ZL = 6.5 + j1.5
At 433MHz: ZS = 9.5 - j2.5
ZL = 8.5 - j1.5
ZS and ZL reflect the impedances that should be pre-
sented to the transistor’s base and collector. The pack-
age parasitics are dominated by inductance (as shown
in Figure 3), and need to be accounted for when calcu-
lating ZS and ZL.
The internal bond and package inductances shown
in Figure 3 should be included as part of the end-
application matching network, depending upon exact
layout topology.
Slug Layout Techniques
The most important connection to make to the
MAX2601/MAX2602 is the back side. It should connect
directly to the PC board ground plane if it is on the top
side, or through numerous plated through-holes if the
ground plane is buried. For maximum gain, this con-
nection should have very little self-inductance. Since it
is also the thermal path for heat dissipation, it must
have low thermal impedance, and the ground plane
should be large.
4
2.8nH
3
2
MAX2601
MAX2602
1
2.8nH
2.8nH
ZS
5
6
2.8nH
ZL
7
8
Figure 3. Optimum Port Impedance
_______________________________________________________________________________________ 5

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