CS4385-CQZR Ver la hoja de datos (PDF) - Cirrus Logic

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CS4385-CQZR

114 dB, 192 kHz 8-Channel D/A Converter

Cirrus Logic 

CS4385

SWITCHING CHARACTERISTICS - PCM

Inputs: Logic 0 = GND, Logic 1 = VLS, CL = 20 pF.

Parameters

Symbol

RST pin Low Pulse Width

(Note 14)

MCLK Frequency

MCLK Duty Cycle

Input Sample Rate - LRCK (Manual selection)

Input Sample Rate - LRCK (Auto detect)

LRCK Duty Cycle

SCLK Duty Cycle

SCLK High Time

SCLK Low Time

LRCK Edge to SCLK Rising Edge

SCLK Rising Edge to LRCK Falling Edge

TDM LRCK hightime pulse

SDIN Setup Time Before SCLK Rising Edge

SDIN Hold Time After SCLK Rising Edge

(Note 15)

Single-Speed Mode Fs

Double-Speed Mode Fs

Quad-Speed Mode Fs

Single-Speed Mode Fs

Double-Speed Mode Fs

Quad-Speed Mode Fs

(Note 16)

(Note 17)

tsckh

tsckl

tlcks

tlckd

tlpw

tds

tdh

Min

1

1.024

45

4

50

100

4

84

170

45

45

8

8

5

5

1/fSCLK

3

5

Max

-

55.2

55

54

108

216

54

108

216

55

55

-

-

-

-

7/fSCLK

-

-

Units

ms

MHz

%

kHz

kHz

kHz

kHz

kHz

kHz

%

%

ns

ns

ns

ns

ns

ns

ns

Notes:

14. After powering up, RST should be held low until after the power supplies and clocks are settled.

15. See Tables 1 - 3 for suggested MCLK frequencies.

16. Not valid for TDM Mode.

17. MSB of CH1 is always the second SCLK rising edge following LRCK rising edge.

LRCK

tlcks

tsckh

tsckl

SCLK

SDINx

tds

tdh

MSB

MSB-1

Figure 1. Serial Audio Interface Timing

t lp w

LRCK

SCLK

S D IN 1

t lc k s

t sckh

tsckl

t lc k d

t lcks

tds

tdh

MSB

M S B -1

Figure 2. TDM Serial Audio Interface Timing

DS671F2

15

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