CDB5345 Ver la hoja de datos (PDF) - Cirrus Logic

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CDB5345

104 dB, 24-Bit, 192 kHz Stereo Audio ADC

Cirrus Logic 

CS5345

SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT

Inputs: Logic 0 = DGND = AGND = 0 V, Logic 1 = VLC, CL = 30 pF.

Parameter

Symbol

Min

Max

SCL Clock Frequency

fscl

-

RESET Rising Edge to Start

tirs

500

Bus Free Time Between Transmissions

tbuf

4.7

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

Clock Low time

tlow

4.7

Clock High Time

thigh

4.0

Setup Time for Repeated Start Condition

tsust

4.7

SDA Hold Time from SCL Falling

(Note 19)

thdd

0

SDA Setup time to SCL Rising

tsud

250

Rise Time of SCL and SDA

(Note 20) trc, trd

-

Fall Time SCL and SDA

(Note 20) tfc, tfd

-

Setup Time for Stop Condition

tsusp

4.7

Acknowledge Delay from SCL Falling

tack

300

100

-

-

-

-

-

-

-

-

1

300

-

1000

Unit

kHz

ns

µs

µs

µs

µs

µs

µs

ns

µs

ns

µs

ns

19. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.

20. Guaranteed by design.

RST

t irs

Stop

Start

SDA

t buf

t hdst

t high

Repeated

S ta rt

t rd

t hdst

Stop

t fd

t fc

t susp

SCL

t

low

t

hdd

t sud t ack

t sust

t rc

Figure 5. Control Port Timing - I²C Format

20

DS658F2

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