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CS5345-DQZR Ver la hoja de datos (PDF) - Cirrus Logic

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CS5345-DQZR Datasheet PDF : 41 Pages
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CS5345
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT
Inputs: Logic 0 = DGND = AGND = 0 V, Logic 1 = VLC, CL = 30 pF.
Parameter
Symbol
Min
Max
CCLK Clock Frequency
RESET Rising Edge to CS Falling
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT Stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
fsck
-
6.0
tsrs
500
-
tcsh
1.0
-
tcss
20
-
tscl
66
-
tsch
66
-
tdsu
40
-
(Note 21)
tdh
15
-
tpd
-
50
tr1
-
25
tf1
-
25
(Note 22)
tr2
-
100
(Note 22)
tf2
-
100
Units
MHz
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21. Data must be held for sufficient time to bridge the transition time of CCLK.
22. For fsck <1 MHz.
RST
t srs
CS
t css
t scl t sch
t csh
CCLK
t r2
t f2
CDIN
CDOUT
t dsu
t dh
t pd
Figure 6. Control Port Timing - SPI Format
DS658F2
21

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