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CL-PD6833

PCI-to-CardBus Host Adapter

Cirrus Logic 

CL-PD6833

PCI-to-CardBus Host Adapter

Table of Contents

1. CONVENTIONS.......................................................................................................................7

2. PIN INFORMATION .................................................................................................................9

2.1 Pin Diagrams........................................................................................................................................10

2.2 Pin Description Conventions ................................................................................................................12

2.3 Pin Descriptions ...................................................................................................................................13

3. INTRODUCTION TO THE CL-PD6833..................................................................................25

3.1 System Architecture .............................................................................................................................25

3.1.1 PC Card Basics.......................................................................................................................25

3.1.2 CL-PD6833 R2 Windowing Capabilities..................................................................................26

3.1.3 Zoomed Video Port .................................................................................................................29

3.1.4 Interrupts .................................................................................................................................30

3.1.5 PCI/Way DMA .........................................................................................................................34

3.1.6 Power Management ................................................................................................................34

3.1.7 Socket Power Management Features .....................................................................................35

3.1.8 Bus Sizing ...............................................................................................................................37

3.1.9 Programmable PC Card Timing ..............................................................................................37

3.1.10 ATA Mode Operation ...............................................................................................................37

3.1.11 PC Card Sensing ....................................................................................................................37

3.2 Upgrading from the CL-PD6832 to the CL-PD6833.............................................................................38

3.2.1 Added Registers......................................................................................................................39

3.3 Host Access to Registers .....................................................................................................................42

3.4 Power-On Setup...................................................................................................................................44

4. REGISTER DESCRIPTION CONVENTIONS.......................................................................45

5. PCI CONFIGURATION REGISTERS....................................................................................47

5.1 Vendor ID and Device ID......................................................................................................................48

5.2 Command and Status ..........................................................................................................................49

5.3 Revision ID and Class Code ................................................................................................................52

5.4 Cache Line Size, Latency Timer, Header Type, and BIST ...................................................................53

5.5 Memory Base Address.........................................................................................................................54

5.6 CardBus Status ....................................................................................................................................55

5.7 PCI Bus Number, CardBus Number, Subordinate Bus Number, and CardBus Latency Timer ............57

5.8 Memory Base 0–1................................................................................................................................58

5.9 Memory Limit 0–1 ................................................................................................................................59

5.10 I/O Base 0–1 ........................................................................................................................................60

5.11 I/O Limit 0–1.........................................................................................................................................61

5.12 Interrupt Line, Interrupt Pin, and Bridge Control ..................................................................................62

5.13 Subsystem Vendor ID and Subsystem Device ID ................................................................................65

5.14 PC Card 16-Bit IF Legacy Mode Base Address...................................................................................66

5.15 Power Management Registers .............................................................................................................67

5.16 Power Management Control and Status ..............................................................................................68

5.17 DMA Slave Configuration Register.......................................................................................................70

5.18 Socket Number ....................................................................................................................................71

5.19 Configuration Miscellaneous 1 .............................................................................................................73

June 1998

ADVANCE DATA BOOK v0.3

3

TABLE OF CONTENTS

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