CL-PS6700 Ver la hoja de datos (PDF) - Cirrus Logic

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CL-PS6700

Low-Power PC Card Controller for the CL-PS7111

Cirrus Logic 

CL-PS6700

Low-Power PC Card Controller

2. PIN DESCRIPTIONS

2.1 CL-PS7111-to-CL-PS6700 Interface Signals

The conventions used for the power sources on the CL-PS7111-to-CL-PS6700 interface are listed in

Table 2-1.

Table 2-1. Power Source Conventionsa

Symbol

sys

pcm

VDDhi

Power Source

system

PCMCIA

VDDhi pin

a See Section 2.3 on page 17 for details on

power and ground pins.

2.1.1 Address/Data Bus Signals

Signal

Type

Power

Source

Description

MD[15:0] I/O

sys Multiplexed address and data bus: The MD bus carries address information during a two-clock

address phase and data during a one- or two-clock data phase.

Address Phase: A PC Card address is a 26-bit byte address. The MD bus carries the upper 10

address bits, plus control bits during the first clock of Chip Enable (PCE_L low), and the remaining

(lower) 16 address bits during the second clock.

CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED

10

PIN DESCRIPTIONS

November 1997

PRELIMINARY DATA BOOK v1.0

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