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CS3318-CQZR

Stereo Digital Volume Control

Cirrus Logic 

CS3318

CONTROL PORT SWITCHING CHARACTERISTICS - I²C FORMAT

(Inputs: Logic 0 = DGND, Logic 1 = VD, CL = 20 pF)

Parameter

Symbol

Min

Max

SCL Clock Frequency

fscl

-

RESET Rising Edge to Start

tirs

100

Bus Free Time Between Transmissions

tbuf

4.7

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

Clock Low time

tlow

4.7

Clock High Time

thigh

4.0

Setup Time for Repeated Start Condition

tsust

4.7

SDA Hold Time from SCL Falling

(Note 7)

thdd

0

SDA Setup time to SCL Rising

tsud

250

Rise Time of SCL and SDA

trc, trd

-

Fall Time SCL and SDA

tfc, tfd

-

Setup Time for Stop Condition

tsusp

4.7

Acknowledge Delay from SCL Falling

tack

300

100

-

-

-

-

-

-

-

-

1

300

-

1000

Unit

kHz

ns

µs

µs

µs

µs

µs

µs

ns

µs

ns

µs

ns

7. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.

RESET

t irs

Stop

Start

SDA

t buf

t hdst

t high

R e p e a te d

Sta rt t rd

t hdst

Stop

t fd

t fc

t susp

SCL

t

low

t

hdd

t sud t ack

t sust

t rc

Figure 1. Control Port Timing - I²C Format

10

DS693F1

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