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CS4384

103 dB, 192 kHz 8-Channel D/A Converter

Cirrus Logic 

CS4384

TABLE OF CONTENTS

1. PIN DESCRIPTION................................................................................................................................. 6

2. CHARACTERISTICS AND SPECIFICATIONS...................................................................................... 8

SPECIFIED OPERATING CONDITIONS .................................................................................................... 8

ABSOLUTE MAXIMUM RATINGS............................................................................................................... 8

DAC ANALOG CHARACTERISTICS........................................................................................................... 9

DAC ANALOG CHARACTERISTICS - ALL MODES (CONTINUED) ........................................................ 10

POWER AND THERMAL CHARACTERISTICS........................................................................................ 10

COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE............................................ 11

COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE............................................ 12

DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSE .................................................. 12

DIGITAL CHARACTERISTICS .................................................................................................................. 13

SWITCHING CHARACTERISTICS - PCM ................................................................................................ 14

SWITCHING CHARACTERISTICS - DSD................................................................................................. 15

SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT.................................................... 16

SWITCHING CHARACTERISTICS - CONTROL PORT - SPI™ FORMAT ............................................... 17

3. APPLICATIONS ................................................................................................................................... 20

3.1 Master Clock.................................................................................................................................. 20

3.2 Mode Select.................................................................................................................................. 21

3.3 Digital Interface Formats ............................................................................................................... 22

3.3.1 OLM #1 ................................................................................................................................ 23

3.3.2 OLM #2 ................................................................................................................................ 23

3.3.3 OLM #3 ................................................................................................................................ 24

3.3.4 OLM #4 ................................................................................................................................ 24

3.3.5 TDM ..................................................................................................................................... 25

3.4 Oversampling Modes..................................................................................................................... 25

3.5 Interpolation Filter .......................................................................................................................... 25

3.6 De-Emphasis ................................................................................................................................. 26

3.7 ATAPI Specification ....................................................................................................................... 26

3.8 Direct Stream Digital (DSD) Mode................................................................................................. 27

3.9 Grounding and Power Supply Arrangements ................................................................................ 28

3.9.1 Capacitor Placement............................................................................................................ 28

3.10 Analog Output and Filtering ......................................................................................................... 28

3.11 The MUTEC Outputs ................................................................................................................... 29

3.12 Recommended Power-Up Sequence .......................................................................................... 29

3.12.1 Hardware Mode.................................................................................................................. 29

3.12.2 Software Mode ................................................................................................................... 30

3.13 Recommended Procedure for Switching Operational Modes...................................................... 30

3.14 Control Port Interface .................................................................................................................. 30

3.14.1 MAP Auto Increment .......................................................................................................... 30

3.14.2 I²C Mode ............................................................................................................................ 30

3.14.3 SPI™ Mode........................................................................................................................ 32

3.15 Memory Address Pointer (MAP) ................................................................................................. 32

3.15.1 INCR (Auto Map Increment Enable) .................................................................................. 32

3.15.2 MAP4-0 (Memory Address Pointer) ................................................................................... 32

4. REGISTER QUICK REFERENCE ....................................................................................................... 33

5. REGISTER DESCRIPTION .................................................................................................................. 34

5.1 Chip Revision (address 01h) ......................................................................................................... 34

5.1.1 Part Number ID (part) [Read Only]....................................................................................... 34

5.2 Mode Control 1 (address 02h) ....................................................................................................... 34

5.2.1 Control Port Enable (CPEN) ................................................................................................ 34

5.2.2 Freeze Controls (FREEZE) .................................................................................................. 35

5.2.3 PCM/DSD Selection (DSD/PCM)......................................................................................... 35

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