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CRD4525-Q1

30 W Digital Audio Amplifier with Integrated ADC

Cirrus Logic 

2. PIN DESCRIPTIONS - HARDWARE MODE

CS4525

48 47 46 45 44 43 42 41 40 39 38 37

CLK_FREQ0 1

CLK_FREQ1 2

ADC/SP 3

LRCK 4

SCLK 5

SDIN 6

MUTE 7

RST 8

LVD 9

DGND 10

VD_REG 11

VD 12

Thermal Pad

Top-Down (Through Package) View

48-Pin QFN Package

13 14 15 16 17 18 19 20 21 22 23 24

36 VP

35 OUT1

34 PGND

33 PGND

32 OUT2

31 VP

30 VP

29 OUT3

28 PGND

27 PGND

26 OUT4

25 VP

Pin Name

CLK_FREQ0

CLK_FREQ1

ADC/SP

LRCK

SCLK

SDIN

MUTE

RST

Pin #

Pin Description

1 Clock Frequency (Input) - Determines the frequency of the clock expected to be driven into the

2 SYS_CLK pin.

3

ADC/Serial Port (Input) - Selects between the Analog to Digital Converter and the Serial Port for

audio input. Selects the ADC when high or the serial port when low.

4

Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial

audio data line.

5 Serial Clock (Input) - Serial bit clock for the serial audio interface.

6 Serial Audio Data Input (Input) - Input for two’s complement serial audio data.

7

Mute (Input) - The PWM outputs will output silence as a 50% duty cycle signal when this pin is

driven low.

8

Reset (Input) - The device enters a low power mode and all internal registers are reset to their

default settings when this pin is driven low.

10

DS726PP1

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