CS4525-CNZR Ver la hoja de datos (PDF) - Cirrus Logic
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CS4525-CNZR Datasheet PDF : 98 Pages
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CS4525
SERIAL AUDIO INPUT PORT SWITCHING SPECIFICATIONS
AGND = DGND = PGND = 0 V; TA = 25°C; VD = 3.3 V; Inputs: Logic 0 = DGND; Logic 1 = VD.
Parameters
Symbol
Min
Nominal
Supported Input Sample Rates
28.5
32
FSI
39.5
39.5
44.1
48
86.4
96
LRCK Duty Cycle
45
-
SCLK Frequency
SCLK Duty Cycle
(Note 8),(Note 9) 1/tp
FSI*2*Nbits
-
45
-
LRCK Setup Time Before SCLK Rising Edge
ts(LK-SK)
40
-
SDIN Setup Time Before SCLK Rising Edge
ts(SD-SK)
25
-
SDIN Hold Time After SCLK Rising Edge
th
10
-
RST pin Low Pulse Width
(Note 10)
1
-
Max
35.2
52.8
52.8
105.6
55
FCLK/3
55
-
-
-
-
Units
kHz
kHz
kHz
kHz
%
Hz
%
ns
ns
ns
ms
Notes:
8. FCLK is the frequency of the crystal connected to the XTI/XTO pins or the input SYS_CLK signal.
9. Nbits is the number of bits per sample of the serial digital input.
10. After powering up the CS4525, RST should be held low until the power supplies and clocks are stable.
LRCK
SCLK
ts(LK-SK)
//
//
tP
//
tr
tf
//
SDIN
ts(SD-SK)
// th
MSB
//
MSB-1
Figure 7. Serial Audio Input Port Timing
DS726PP1
21
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