PIN DESCRIPTIONS
CS5334 CS5335
High Pass Filter Defeat
OverFlow
Analog Power
Analog Ground
Digital Ground
Digital Power
Master Clock
Serial Data Clock
Serial Data Output
Frame Signal
HP DEFEAT 1
OVFL 2
VA+ 3
AGND 4
DGND 5
VD+ 6
MCLK 7
SCLK 8
SDATA 9
FRAME 10
20 DIF0
Digital Interface Format 0
19 DIF1
Digital Interface Format 1
18 RST
Reset
17 AINL+ Non-Inverting Left Channel Input
16 AINL- Inverting Left Channel Input
15 CMOUT Common Mode Output
14 AINR- Inverting Right Channel Input
13 AINR+ Non-Inverting Right Channel Input
12 LRCK Left/ Right Clock
11 PU
Peak Update
Power Supply Connections
VA+ - Positive Analog Power, Pin 3.
Positive analog supply. Nominally +5 volts.
VD+ - Positive Digital Power, Pin 6.
Positive digital supply. Nominally +5 volts.
AGND - Analog Ground, Pin 4.
Analog ground reference.
DGND - Digital Ground, Pin 5.
Digital ground reference.
Analog Inputs
AINR-, AINR+ - Differential Right Channel Analog Input, Pin 14 and Pin 13.
Analog input connections of the right channel differential inputs. Typically 2 Vrms differential
(1Vrms for each input pin) for a full-scale analog input signal.
AINL-, AINL+ - Differential Left Channel Analog Input, Pin 16 and Pin 17.
Analog input connections of the left channel differential inputs. Typically 2 Vrms differential
(1Vrms for each input pin) for a full-scale analog input signal.
Analog Outputs
CMOUT - Common Mode Output, Pin 15.
This output, nominally 2.2V, can be used to bias the analog input circuitry to the common mode
voltage of the CS5334/5.
14
DS237PP2