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CS5521
(Rev.:2000)

16-Bit or 24-Bit, 2/4/8-Channel ADCs with PGIA

Cirrus Logic 

CS5521/22/23/24/28

2. GENERAL DESCRIPTION

The CS5521/22/23/24/28 are highly integrated ∆Σ

Analog-to-Digital Converters (ADCs) which use

charge-balance techniques to achieve 16-bit

(CS5521/23) and 24-bit (CS5522/24/28) perfor-

mance. The ADCs come as either two-channel

(CS5521/22), four-channel (CS5523/24), or eight-

channel (CS5528) devices, and include a low input

current, chopper-stabilized instrumentation ampli-

fier. To permit selectable input spans of 25 mV,

55 mV, 100 mV, 1 V, 2.5 V, and 5 V, the ADCs in-

clude a PGA (programmable gain amplifier). To

accommodate ground-based thermocouple applica-

tions, the devices include a CPD (Charge Pump

Drive) which provides a negative bias voltage to

the on-chip amplifiers.

These devices also include a fourth order DS mod-

ulator followed by a digital filter which provides

eight selectable output word rates of 1.88 Hz,

3.76 Hz, 7.51 Hz, 15 Hz, 30 Hz, 61.6 Hz, 84.5 Hz,

and 101.1 Hz (XIN = 32.768 kHz). The devices are

capable of producing output update rates up to

617 Hz when a 200 kHz clock is used

(CS5522/24/28) or up to 401 Hz using a 130 kHz

clock (CS5521/23). Further note that the digital fil-

ters are designed to settle to full accuracy within

one conversion cycle and simultaneously reject

both 50 Hz and 60 Hz interference when operated

at word rates below 30 Hz (assuming a XIN clock

frequency of 32.768 kHz).

To ease communication between the ADCs and a

micro-controller, the converters include an easy to

use three-wire serial interface which is SPI™ and

Microwire™ compatible.

2.1 Analog Input

Figure 4 illustrates a block diagram of the analog in-

put signal path inside the CS5521/22/23/24/28. The

front end consists of a multiplexer (break before

make configuration), a chopper-stabilized instru-

mentation amplifier with fixed gain of 20X,

coarse/fine charge buffers, and a programmable gain

section. For the 25 mV, 55 mV, and 100 mV input

ranges, the input signals are amplified by the 20X in-

strumentation amplifier. For the 1 V, 2.5 V, and 5 V

input ranges, the instrumentation amplifier is by-

passed and the input signals are connected to the

Programmable Gain block via coarse/fine charge

buffers.

AIN2+

AIN2-

AIN1+

AIN1-

CS5522

IN+

M

U

X IN-

AIN4+

CS5524

AIN4-

*

M IN+

*

U

IN+

*

AIN1+

X IN-

X20

AIN1-

IN-

AIN8+

AIN7+

*

*

*

AIN1+

CS5528

M IN+

U

X

IN-

VREF+ VREF-

Programmable

Gain

Differential

4th order

delta- sigma

modulator

Digital

Filter

NBV also supplies the negative

supply voltage for the coarse/fine

change buffers

NBV

Figure 4. Multiplexer Configurations

DS317F2

13

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