CDB6422 Ver la hoja de datos (PDF) - Cirrus Logic
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CDB6422 Datasheet PDF : 48 Pages
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CS6422
STROBE pulses must be applied to latch the data
into the CS6422.
Since the MCR is a shift register, the STROBE can
be run arbitrarily slowly with a duty cycle limited
only by the minimum high and low time specified
in “Switching Characteristics”. The Microcontrol-
ler Interface is polled at 125 µs intervals, so regis-
ter writes must be spaced at least 125 µs apart or
the register contents may be overwritten.
3.2.2 Register Definitions
The six control registers accessible through the
MCR are described in detail in the following tables.
These registers are addressed by bits b3-0 of the
MCR. Bit ‘b0’ must always be ‘0’. Table 2 shows
the register map with the default settings. Tables 3
through 8 show the control registers in more detail.
The Register Map at the top of each register de-
scription shows the names of all the bits, with their
reset values below the bitfield name. The reset val-
ue can also be found in the Word column of the bit-
field summary as indicated by an ‘*’.
STROBE
DATA
DRDY
four extra strobe pulses
1234
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Figure 7. Microcontroller Interface
# b15 b14 b13 b12 b11 b10 b9 b8 b7
b6
b5
b4
b3-0
0 Mic HDD
GB
RVol
TSD
ACC
TSMde 0000
1
0
10
0100
0
00
0
1 THDet
Taps
TVol
RSD
NCC
AuNECD 0010
00
10
1010
0
00
0
2 RHDet
RSThd
NseRmp
HDly
HHold TDSRmp RDSRmp IdlTx 0100
00
00
00
00
0
0
0
0
3
TSAtt PCSen
TDbtS
RDbtS
TSThd
TSBias
0110
00
0
000
00
00
00
4
AErle
AFNse
NErle
NFNse
RGain
TGain
1000
00
00
00
00
00
00
5 HwlD TD APCD NPCD APFD NPFD AECD NECD
ASdt
NSdt
1010
0
0
0
0
0
0
0
0
00
00
Table 2. MCR Control Register Mapping
DS295F1
13
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