CS8952 Ver la hoja de datos (PDF) - Cirrus Logic
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CS8952 Datasheet PDF : 81 Pages
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CS8952
10BASE-T MII TRANSMIT TIMING
Parameter
TXD[3:0] Setup to TX_CLK High
TX_ER Setup to TX_CLK High
TX_EN Setup to TX_CLK High
TXD[3:0] Hold after TX_CLK High
TX_ER Hold after TX_CLK High
TX_EN Hold after TX_CLK High
TX_EN “high” to CRS asserted latency
TX_EN “low” to CRS de-asserted latency
TX_EN “high” to TX+/- output (TX Latency)
SQE Timing
COL (SQE) Delay after CRS de-asserted
COL (SQE) Pulse Duration
Symbol
Min
Typ
Max
Unit
tSU1
10
-
-
ns
tSU2
10
-
-
ns
tSU3
10
-
-
ns
tHD1
0
-
-
ns
tHD2
0
-
-
ns
tHD3
0
-
-
ns
tCRS1
0
-
4
BT
tCRS2
0
-
16
BT
tLAT
6
-
14
BT
tCOL
0.65
0.9
tCOLP
0.65
1.0
1.6
µs
1.6
µs
TX_CLK
tSU3
TX_EN
tSU2
TX_ER
tSU1
TXD[3:0]
CRS
TX+/-
10BASE-T Transmit Timing
tHD3
tHD2
tHD1
tCRS1
tLAT
Valid
Data
TX_CLK
SQE Timing
COL
tSQE
tSQEP
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
DS206F1
tCRS2
Input/Output
Input
Input
Input
Output
Output
Input/Output
Output
13
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