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CS8416-IZ Ver la hoja de datos (PDF) - Cirrus Logic

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CS8416-IZ Datasheet PDF : 48 Pages
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2 TYPICAL CONNECTION DIAGRAMS
CS8416
+3.3V
Ferrite *
+3.3V
Bead
Analog
Supply *
10 µF 0.1µF 1nF
VL+
** AES3 /
S/PDIF
Sources
VL+
Microcontroller
10 µF 0.1µF 1nF
VA+ VD+
VL+
RXN
RXP0
RXP1
RXP2
RXP3
RXP4
RXP5
RXP6
RXP7
CS8416
SDOUT
OLRCK
OSCLK
RMCK
OMCK
AD0 / CS
AD1 / CDIN
SCL / CCLK
SDA / CDOUT
RST
GPO0
GPO1
AD2/GPO2
0.1µF 1nF
47K
Serial Audio
Input
Device
Clock Control
Clock Source
External
Interface
+3.3V to +5V
AGND FILT
DGND
Rflt
Cflt
Crip
***
* A seperate analog supply is only necessary in applications where RMCK is used for a jitter
sensitive tast. For applications where RMCK is not used for a jitter sensitive task, connect
VA+ to VD+ via a ferrite bead. Keep decoupling capacitors between VA+ and AGND.
** Please see section 5.1 "8:2 S/PDIF Input Multiplexer" and Appendix
A for typical input configurations and recommended input circuits.
***
For best jitter performance connect
See Table 2 for PLL filter values.
the
filter
ground
directly
to
the
AGND
pin.
Figure 5. Typical Connection Diagram - Software Mode
10
DS578PP2

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