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CY14B101J

1-Mbit (128 K × 8) Serial (I2C) nvSRAM

Cypress Semiconductor 

CY14C101J

CY14B101J

CY14E101J

AC Switching Characteristics

Over the Operating Range

Parameter[10]

Description

fSCL

tSU; STA

tHD;STA

tLOW

tHIGH

tSU;DATA

tHD;DATA

tDH

tr[12]

tf[12]

tSU;STO

tVD;DATA

tVD;ACK

tOF[12]

tBUF

tSP

Clock frequency, SCL

Setup time for Repeated START

condition

Hold time for START condition

LOW period of the SCL

HIGH period of the SCL

Data in setup time

Data hold time (In/Out)

Data out hold time

Rise time of SDA and SCL

Fall time of SDA and SCL

Setup time for STOP condition

Data output valid time

ACK output valid time

Output fall time from VIH(min) to

VIL(max)

Bus free time between STOP and

next START condition

Pulse width of spikes that must be

suppressed by input filter

3.4 MHz [11]

Min

Max

–

3400

160

–

160

–

160

–

60

–

10

–

0

–

0

–

–

80

–

80

160

–

–

130

–

130

–

80

0.3

–

–

10

1 MHz [11]

Min

Max

–

1000

250

–

250

–

500

–

260

–

100

–

0

–

0

–

–

120

–

120

250

–

–

400

–

400

–

120

0.5

–

–

50

400 kHz [11]

Min

Max

–

400

600

–

Unit

kHz

ns

600

1300

600

100

0

0

–

–

600

–

–

–

–

ns

–

ns

–

ns

–

ns

–

ns

–

ns

300

ns

300

ns

–

ns

900

ns

900

ns

250

ns

1.3

–

µs

–

50

ns

Switching Waveforms

Figure 31. Timing Diagram

SDA

SCL

tr

tLOW

tHIGH

tSU;DATA

tHD;STA

S

START condition

tHD;DATA

tVD;DAT

tf

tHD;STA

tSU;STA

Sr

tf tr

Repeated START condition

tSP

tVD;ACK tSU;STO

tBUF

9th clock

(ACK)

P

S

STOP condition START condition

Notes

10.

11.

Test conditions assume signal transition time of 10 ns or less, timing

BIOuLsaLnodaldoa(Cdbc)acpoancsitiadnecreatsiohnosw; nCbin<F5ig0u0repF30foornI2pCagcelo2c0k.frequency

reference levels of VCC/2,

(SCL) 100/400 KHz; Cb <

input pulse levels

550 pF for SCL at

of 0 to VCC(typ), and output

1000 kHz; Cb < 100 pF for

loading

SCL at

of the specified

3.4 MHz.

12. These parameters are guaranteed by design and are not tested.

Document Number: 001-54050 Rev. *M

Page 21 of 31

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