CY62136CV18 Ver la hoja de datos (PDF) - Cypress Semiconductor

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CY62136CV18

128K x 16 Static RAM

Cypress Semiconductor 

Switching Waveforms

Write Cycle No. 1 (WE Controlled)[10, 14, 15]

ADDRESS

CE

tSA

WE

tWC

tSCE

tAW

tPWE

CY62136CV18 MoBL2™

tHA

BHE/BLE

tBW

OE

DATA I/O

NOTE 16

tHZOE

Write Cycle No. 2 (CE Controlled) [10, 14, 15]

ADDRESS

CE

WE

tSA

tAW

tSD

DATAIN VALID

tWC

tSCE

tPWE

BHE/BLE

tBW

OE

DATA I/O

NOTE 16

tHZOE

tSD

DATAIN VALID

Notes:

14. Data I/O is high impedance if OE = VIH.

15. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.

16. During this period, the I/Os are in output state and input signals should not be applied.

tHD

tHA

tHD

Document #: 38-05016 Rev. *C

Page 7 of 12

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