US3021BCW Ver la hoja de datos (PDF) - Unisem
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US3021BCW Datasheet PDF : 8 Pages
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US3021B
Note 1: Vs refers to the set point voltage given in Table 1.
D4 D3 D2 D1 D0 Vs
01
1
1
1
1.30
01
1
1
0
1.35
01
1
0
1
1.40
01
1
0
0
1.45
01
0
1
1
1.50
01
0
1
0
1.55
01
0
0
1
1.60
01
0
0
0
1.65
00
1
1
1
1.70
00
1
1
0
1.75
00
1
0
1
1.80
00
1
0
0
1.85
00
0
1
1
1.90
00
0
1
0
1.95
00
0
0
1
2.00
00
0
0
0
2.05
D4 D3 D2 D1 D0 Vs
1
1
1
1
1
2.0
1
1
1
1
0
2.1
1
1
1
0
1
2.2
1
1
1
0
0
2.3
1
1
0
1
1
2.4
1
1
0
1
0
2.5
1
1
0
0
1
2.6
1
1
0
0
0
2.7
1
0
1
1
1
2.8
1
0
1
1
0
2.9
1
0
1
0
1
3.0
1
0
1
0
0
3.1
1
0
0
1
1
3.2
1
0
0
1
0
3.3
1
0
0
0
1
3.4
1
0
0
0
0
3.5
PIN DESCRIPTIONS
Table 1 - Set point voltage vs. VID codes
PIN# PIN SYMBOL
7 VID0
6 VID1
5 VID2
4 VID3
3 VID4
8 PGOOD
21 FB
1 Drive2
9 SD
Pin Description
LSB input to the DAC that programs the output voltage. This pin is TTL compatible that
realizes a logic “1” as either HI or Open. When left open,his pin is pulled up internally by
a 27kΩ resistor to 5V supply.
Input to the DAC that programs the output voltage. This pin is TTL compatible that real-
izes a logic “1” as either HI or Open. When left open,his pin is pulled up internally by a
27kΩ resistor to 5V supply.
Input to the DAC that programs the output voltage. This pin is TTL compatible that real-
izes a logic “1” as either HI or Open. When left open,his pin is pulled up internally by a
27kΩ resistor to 5V supply.
MSB input to the DAC that programs the output voltage. This pin is TTL compatible that
realizes a logic “1” as either HI or Open. When left open,his pin is pulled up internally by
a 27kΩ resistor to 5V supply.
This pin selects a range of output voltages for the DAC.When in the LOW state the range
is 1.3V to 2.05V and when it switches to HI state the range is 2.0V to 3.5V. This pin is
TTL compatible that realizes a logic “1” as either HI or Open. When left open,his pin is
pulled up internally by a 27kΩ resistor to 5V supply.
This pin is an open collector output that switches LO when any of the outputs are outside
of the specified under voltage trip point. It also switches low when Vsen1 pin is more than
10% above the DAC voltage setting.
This pin provides the feedback for the synchronous switching regulator. Typically this pin
can be connected directly to the output of the switching regulator. However, a resistor
divider is recommended to be connected from this pin to vout1 and GND to adjust the
output voltage for any drop in the output voltage that is caused by the trace resistance.
The value of the resistor connected from Vout1 to FB1 must be less than 1000Ω.
This pin controls the gate of an external MOSFET for the AGP linear regulator.
This pin provides shutdown for all the regulatos. A TTL compatible, logic level high applied
to this pin disables all the outputs and discharges the soft start capacitor. The SD signal
turns off the synchronous allowing body diode to conduct and discharge the output cap.
4-4
Rev. 1.4
12/8/00
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