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HM62V256LT-8SL

32,768-word × 8-bit Low Voltage Operation CMOS Static RAM

Hitachi -> Renesas Electronics 

HM62V256 Series

AC Characteristics (Ta = 0 to +70°C, VCC = 2.7 V to 3.6 V, unless otherwise noted.)

Test Conditions

• Input pulse levels: 0.4 V to 2.4 V

• Input rise and fall time: 5 ns

• Input and output timing reference level: 1.4 V

Output Load

Dout

500Ω

50 pF*

1.4 V

(Including scope & jig)

Read Cycle

HM62V256

-7

-8

-10

Parameter

Symbol Min Max Min Max Min Max Unit Notes

Read cycle time

tRC

70 — 85 — 100 — ns

Address access time

tAA

— 70 — 85 — 100 ns

Chip select access time

tACS

— 70 — 85 — 100 ns

Output enable to output valid

tOE

— 35 — 45 — 50 ns

Chip selection to output in low-Z

tCLZ

10 — 10 — 10 — ns 2

Output enable to output in low-Z

tOLZ

5

—5

—5

— ns 2

Chip deselection to output in high-Z tCHZ

0

25 0

30 0

35 ns 1, 2

Output disable to output in high-Z

tOHZ

0

25 0

30 0

35 ns 1, 2

Output hold from address change

tOH

10 — 10 — 10 — ns

Notes: 1. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and

are not referred to output voltage levels.

2. This parameter is sampled and not 100% tested.

7

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