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MB91F155PFV-G Ver la hoja de datos (PDF) - Fujitsu

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MB91F155PFV-G Datasheet PDF : 104 Pages
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MB91F155/MB91154
Pin No. Pin name
46
BGRNT/P81
47
BRQ/P82
48
RD/P83
49
WR0/P84
50
WR1/P85
51
CLK/P86
52
MD2
53
MD1
54
MD0
55
RST
57
X1
58
X0
60
INT0/PC0
61
INT1/PC1
62
INT2/PC2
63
INT3/PC3
Circuit
type
Function
External bus release acceptance output
This function is enabled when external bus release acceptance output is
F
allowed.
Output “L” upon releasing of the external bus.
This pin is available as a port when external bus release acceptance out-
put is not allowed.
External bus release request input
This function is enabled when external bus release request input is al-
C
lowed.
Input “1” when the release of the external bus is desired.
This pin is available as a port when external bus release request input is
not in use.
External bus read strobe output
F
This function is enabled when external bus read strobe output is allowed.
This pin is available as a port when external bus read strobe output is not
allowed.
External bus write strobe output
F This function is enabled in external bus mode.
This pin is available as a port in single chip mode.
External bus write strobe output
This function is enabled in external bus mode when the bus width is 16
F bits.
This pin is available as a port in single chip mode or when the external bus
width is 8 bits.
System clock output
F The pin outputs the same clock as the external bus operating frequency.
The pin is available as a port when it is not used to output the clock.
Mode pins
G To use these pins, connect them directly to either Vcc or Vss.
Use these pins to set the basic MCU operating mode.
B External reset input
A High-speed clock oscillation pins (16.5 MHz)
External interrupt request input 0-3
Since this input is used more or less continuously when the corresponding
external interrupt is allowed, output by the port needs to be stopped ex-
H
cept when it is performed deliberately.
Since this port is allowed to input also in standby mode, it can be used to
reset the standby state.
These pins are available as ports when external interrupt request input is
not in use.
(Continued)
6

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