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IS61C3216 Datasheet PDF : 8 Pages
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IS61C3216
IS61C3216
32K x 16 HIGH-SPEED CMOS STATIC RAM
ISISSSII®®
JANUARY 1998
FEATURES
• High-speed access time: 10, 12, 15, and 20 ns
• CMOS low power operation
— 450 mW (typical) operating
— 250 µW (typical) standby
• TTL compatible interface levels
• Single 5V ± 10% power supply
• I/O compatible with 3.3V device
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
• Available in 44-pin 400-mil SOJ package and
44-pin TSOP (Type II)
DESCRIPTION
1
The ISSI IS61C3216 is a high-speed, 512K static RAM
organized as 32,768 words by 16 bits. It is fabricated using
ISSI's high-performance CMOS technology. This highly reli-
2 able process coupled with innovative circuit design tech-
niques, yields fast access times with low power consumption.
When CE is HIGH (deselected), the device assumes a standby
3 mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
4 and Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.A
data byte allows Upper Byte (UB) and Lower Byte (LB) access.
5 The IS61C3216 is packaged in the JEDEC standard 44-pin
400-mil SOJ and 44-pin TSOP (Type II).
FUNCTIONAL BLOCK DIAGRAM
6
7
A0-A14
DECODER
32K x 16
MEMORY ARRAY
8
VCC
GND
9
I/O0-I/O7
Lower Byte
I/O
DATA
COLUMN I/O
I/O8-I/O15
Upper Byte
CIRCUIT
10
CE
11
OE
CONTROL
WE
CIRCUIT
UB
LB
12
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. © Copyright 1997, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc.
SR007-1B
01/26/98
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