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CY7C027-15AI Ver la hoja de datos (PDF) - Cypress Semiconductor

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fabricante
CY7C027-15AI
Cypress
Cypress Semiconductor Cypress
CY7C027-15AI Datasheet PDF : 18 Pages
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PRELIMINARY
CY7C027/028
CY7C037/038
Functional Description
The CY7C027/028 and CY7C037/038 are low-power CMOS
32K, 64K x 16/18 dual-port static RAMs. Various arbitration
schemes are included on the devices to handle situations
when multiple processors access the same piece of data. Two
ports are provided, permitting independent, asynchronous ac-
cess for reads and writes to any location in memory. The de-
vices can be utilized as standalone 16/18-bit dual-port static
RAMs or multiple devices can be combined in order to function
as a 32/36-bit or wider master/slave dual-port static RAM. An
M/S pin is provided for implementing 32/36-bit or wider mem-
ory applications without the need for separate master and
slave devices or additional discrete logic. Application areas
include interprocessor/multiprocessor designs, communica-
tions status buffering, and dual-port video/graphics memory.
Each port has independent control pins: dual chip enables
(CE0 and CE1), read or write enable (R/W), and output enable
(OE). Two flags are provided on each port (BUSY and INT). BUSY
signals that the port is trying to access the same location currently
being accessed by the other port. The interrupt flag (INT) permits
communication between ports or systems by means of a mail box.
The semaphores are used to pass a flag, or token, from one port to
the other to indicate that a shared resource is in use. The semaphore
logic is comprised of eight shared latches. Only one side can control
the latch (semaphore) at any time. Control of a semaphore indicates
that a shared resource is in use. An automatic power-down feature is
controlled independently on each port by the chip enable pins.
The CY7C027/028 and CY7C037/038 are available in 100-pin
Thin Quad Plastic Flatpack (TQFP) packages.
Pin Configurations
100-Pin TQFP (Top View)
A9L
A10L
A11L
A12L
A13L
A14L
[Note 6] A15L
NC
NC
LBL
UBL
CE0L
CE1L
SEML
VCC
R/WL
OEL
GND
GND
I/O15L
I/O14L
I/O13L
I/O12L
I/O11L
I/O10L
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
1
75
2
74
3
73
4
72
5
71
6
70
7
69
8
68
9
67
10
66
11
65
12
CY7C028 (64K x 16)
64
13
63
14
CY7C027 (32K x 16)
62
15
61
16
60
17
59
18
58
19
57
20
56
21
55
22
54
23
53
24
52
25
51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
A9R
A10R
A11R
A12R
A13R
A14R
A15R [Note 6]
NC
NC
LBR
UBR
CE0R
CE1R
SEMR
GND
R/WR
OER
GND
GND
I/O15R
I/O14R
I/O13R
I/O12R
I/O11R
I/O10R
Note:
6. This pin is NC for CY7C027.
2

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